ic42s16101-7tig ETC-unknow, ic42s16101-7tig Datasheet - Page 73
![no-image](/images/no-image-200.jpg)
ic42s16101-7tig
Manufacturer Part Number
ic42s16101-7tig
Description
512k X 16 Bit X 2 Banks 16-mbit Sdram
Manufacturer
ETC-unknow
Datasheet
1.IC42S16101-7TIG.pdf
(78 pages)
- Current page: 73 of 78
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IC42S16101
Read Cycle / Precharge Termination
Integrated Circuit Solution Inc.
DR025-0F 01/17/2005
A0-A9
DQM
CAS latency = 3, burst length = 4
Note 1: A8,A9 = Don't Care.
CKE
RAS
CAS
CLK
A10
A11
WE
CS
I/O
t
CKS
t
CS
T0
t
t
t
t
t
t
t
CS
t
CS
CS
AS
AS
AS
t
CKA
CK
CH
<
BANK 0
ROW
ROW
ACT 0
T1
t
CHI
>
t
t
t
t
t
t
t
t
t
RCD
RAS
RC
AH
AH
CH
CH
CH
AH
T2
t
CL
T3
t
CS
COLUMN m
<
NO PRE
READ 0
BANK 0
T4
(1)
>
t
t
QMD
CAC
T5
t
LZ
T6
t
AC
t
BANK 0 OR 1
CH
<
BANK 0
PRE 0
T7
D
OUT
t
>
OH
m
t
AC
T8
D
OUT
t
OH
m+1
t
AC
t
RQL
t
RP
T9
D
OUT
t
OH
m+2
t
HZ
T10
BANK 1
BANK 0
<
T11
ROW
ROW
ACT
>
t
t
t
RCD
RAS
RP
T12
Undefined
Don’t Care
73
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