ic42s16101-7tig ETC-unknow, ic42s16101-7tig Datasheet - Page 8

• Manufacturer Part Number: ic42s16101-7tig
• Description: 512k X 16 Bit X 2 Banks 16-mbit Sdram
• Manufacturer: ETC-unknow

IC42S16101
OPERATING FREQUENCY / LATENCY RELATIONSHIPS
AC TEST CONDITIONS
8
Symbol Parameter
—
—
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Input
Output Load
CAC
RCD
RAC
RC
RAS
RP
RRD
CCD
DPL
DAL
RBD
RQL
PQL
QMD
DMD
MCD
WBD
WDL
Clock Cycle Time
Operating Frequency
CAS Latency
Active Command To Read/Write Command Delay Time
RAS Latency (t
Command Period (REF to REF / ACT to ACT)
Command Period (ACT to PRE)
Command Period (PRE to ACT)
Command Period (ACT[0] to ACT [1])
Column Command Delay Time
(READ, READA, WRIT, WRITA)
Input Data To Precharge Command Delay Time
Input Data To Active/Refresh Command Delay Time
(During Auto-Precharge)
Burst Stop Command To Output in HIGH-Z Delay Time
(Read)
Burst Stop Command To Input in Invalid Delay Time
(Write)
Precharge Command To Output in HIGH-Z Delay Time
(Read)
Precharge Command To Input in Invalid Delay Time
(Write)
Last Output To Auto-Precharge Start Time (Read)
DQM To Output Delay Time (Read)
DQM To Input Delay Time (Write)
Mode Register Set To Command Delay Time
OUTPUT
RCD
INPUT
CLK
+ t
I/O
(Input/Output Reference Level: 1.4V)
CAC
2.4V
1.4V
0.4V
2.4V
1.4V
0.4V
)
Z
O
= 50
t
OH
t
CS
1.4V
t
CH
t
10 pF
CHI
t
AC
50
t
CK
t
CL
1.4V
+1.4V
200
10
–2
-5
5
3
3
6
6
3
2
1
2
5
3
0
3
0
2
0
2
166
10
–2
-6
6
3
3
6
6
3
2
1
2
5
3
0
3
0
2
0
2
Integrated Circuit Solution Inc.
143
10
–2
-7
7
3
3
6
6
3
2
1
2
5
3
0
3
0
2
0
2
Units
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
MHz
ns
DR025-0F 01/17/2005