hys64t32000hm-5-a Infineon Technologies Corporation, hys64t32000hm-5-a Datasheet - Page 25

• Manufacturer Part Number: hys64t32000hm-5-a
• Description: 240-pin Registered Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

Table 15
Parameter
DQS-DQ skew (for DQS & associated DQ signals)
Write command to 1st DQS latching transition
DQ and DM input setup time (differential data strobe)
DQ and DM input setup time (single-ended strobe)
DQS falling edge hold time from CK (write cycle)
DQS falling edge to CK setup time (write cycle)
Clock half period
Data-out high-impedance time from CK / CK
Address and control input hold time
Address and control input pulse width
(each input)
Address and control input setup time
DQ low-impedance time from CK / CK
DQS low-impedance from CK / CK
Mode register set command cycle time
OCD drive mode output delay
Data output hold time from DQS
Data hold skew factor
Average periodic refresh Interval
Auto-Refresh to Active/Auto-Refresh command period
Read preamble
Read postamble
Active bank A to Active bank B command period
Internal Read to Precharge command delay
Write preamble
Write postamble
Write recovery time for write without Auto-Precharge
Write recovery time for write with Auto-Precharge
Internal Write to Read command delay
Exit power down to any valid command
(other than NOP or Deselect)
Exit active power-down mode to Read command (slow
exit, lower power)
Exit precharge power-down to any valid command
(other than NOP or Deselect)
Exit Self-Refresh to non-Read command
Exit Self-Refresh to Read command
1) For details and notes see the relevant INFINEON component data sheet
2)
Data Sheet
V
DDQ
= 1.8 V ± 0.1 V;
Timing Parameter by Speed Grade - DDR2-400
V
DD
= 1.8 V ± 0.1 V. See notes
25
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WR
t
t
t
t
t
t
DQSQ
DQSS
DS
DS1
DSH
DSS
HP
HZ
IH
IPW
IS
LZ(DQ)
LZ(DQS)
MRD
OIT
QH
QHS
REFI
RFC
RPRE
RPST
RRD
RTP
WPRE
WPST
WR
WTR
XARD
XARDS
XP
XSNR
XSRD
(base)
(base)
(base)
(base)
HYS64T[32/64]0[0/2]0HM–[3S/3.7/5]–A
Micro-DIMM DDR2 SDRAM Modules
DDR2-400
Min.
—
– 0.25
150
25
0.2
0.2
MIN. (
—
475
0.6
350
2
t
2
0
t
—
—
—
105
0.9
0.40
7.5
10
7.5
0.35
0.40
15
t
7.5
2
6 – AL
2
t
200
AC.MIN
HP
WR
RFC
x
–
/
t
t
AC.MIN
CK
+10
t
QHS
t
CL,
t
CH
)
Max.
350
+ 0.25
—
—
—
—
t
—
—
—
t
t
—
12
—
450
7.8
3.9
—
1.1
0.60
—
—
—
—
0.60
—
—
—
—
—
—
—
AC.MAX
AC.MAX
AC.MAX
Electrical Characteristics
03242004-2CBE-IJ2X
Unit
ps
t
ps
ps
t
t
ps
ps
t
ps
ps
ps
t
ns
ps
ns
t
t
ns
ns
ns
t
t
ns
t
ns
t
t
t
ns
t
Rev. 1.1, 2005-10
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
s
s
Note
1)2)3)4)5)6)7)
8)
9)
10)
11)