hys64t32000hm-5-a Infineon Technologies Corporation, hys64t32000hm-5-a Datasheet - Page 33

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hys64t32000hm-5-a

Manufacturer Part Number
hys64t32000hm-5-a
Description
240-pin Registered Ddr2 Sdram Modules
Manufacturer
Infineon Technologies Corporation
Datasheet
3.4.1
For testing the
Table 23
Parameter
CAS Latency
Clock Cycle Time
Active to Read or Write delay
Active to Active / Auto-Refresh
command period
Active bank A to Active bank B
command delay
Active to Precharge Command
Precharge Command Period
Auto-Refresh to Active / Auto-
Refresh command period
Average periodic Refresh interval
1)
2)
Data Sheet
4 & 8 (1 KByte page size)
16 (2 KByte page size); not on 256M component
I
I
DD
DD
I
DD
Measurement Test Condition for DDR2–667D, DDR2–533C and DDR2–400B
Test Conditions
parameters, the timing parameters as in
Symbol
CL
t
t
t
t
t
t
t
t
t
CKIDD
RCD.IDD
RC.IDD
RRD.IDD
RAS.MIN.IDD
RAS.MAX.IDD
RP.IDD
RFC.IDD
REFI
IDD
–3S
DDR2–667D
5
3.75
15
60
7.5
10
45
70000
15
105
7.8
33
Table 23
HYS64T[32/64]0[0/2]0HM–[3S/3.7/5]–A
–3.7
DDR2–533C
4
3.75
15
60
7.5
10
45
70000
15
105
7.8
Micro-DIMM DDR2 SDRAM Modules
are used.
–5
DDR2–400B
3
5
15
55
7.5
10
40
70000
15
105
7.8
Electrical Characteristics
03242004-2CBE-IJ2X
Rev. 1.1, 2005-10
Unit
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
s
Notes
1)
2)

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