hys64d64020gbdl-5-c Qimonda, hys64d64020gbdl-5-c Datasheet - Page 3

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hys64d64020gbdl-5-c

Manufacturer Part Number
hys64d64020gbdl-5-c
Description
200-pin Small Outline Dual -in-line Memory Modules
Manufacturer
Qimonda
Datasheet
1
This chapter lists all main features of the product family HYS64D64020[H/G]BDL–[5/6]–C and the ordering information.
1.1
• Non-parity 200-Pin Small Outline Dual-In-Line Memory
• Two ranks 64M × 64 Organization
• JEDEC standard Double Data Rate Synchronous DRAMs
• Single +2.5 V (± 0.2 V) Power Supply and Single +2.6 V
• Built with 256 Mbit DDR SDRAMs Organised as × 8 in
Rev. 1.21, 2007-01
03292006-F1IB-1I3E
Part Number Speed Code
Speed Grade
Max. Clock Frequency
Modules
(DDR SDRAM)
(± 0.1 V) Power Supply for DDR400
P–TFBGA–60 Packages
Overview
Features
Component
Module
@CL3
@CL2.5
@CL2
f
f
f
CK3
CK2.5
CK2
3
• Programmable CAS Latency, Burst Length, and Wrap
• Auto Refresh (CBR) and Self Refresh
• RAS-lockout Supported
• All Inputs and Outputs SSTL_2 Compatible
• Serial Presence Detect with E
• Jedec Standard form Factor:
• Gold Plated Contacts
–5
DDR400B
PC3200–3033
200
166
133
Sequence (Sequential & Interleave)
67.60 mm × 31.75 mm × 3.80 mm
Small Outline DDR SDRAM Modules
HYS64D64020[H/G]BDL–[5/6]–C
–6
DDR333B
PC2700–2533
166
166
133
t
RAP
=
t
2
RCD
PROM
Internet Data Sheet
Performance
TABLE 1
Unit
MHz
MHz
MHz

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