m391b5273bh1 Samsung Semiconductor, Inc., m391b5273bh1 Datasheet - Page 24
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m391b5273bh1
Manufacturer Part Number
m391b5273bh1
Description
Ddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M391B5273BH1.pdf
(33 pages)
16.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin
DDR3-1066 Speed Bins
16.0 Electrical Characteristics and AC timing
16.1 Refresh Parameters by Device Density
Note :
1. Users should refer to the DRAM supplier data sheet and/or the DIMM SPD to determine if DDR3 SDRAM devices support the following options or
16.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Unbuffered DIMM
Intermal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6
CL = 7
CL = 8
Supported CL Settings
Supported CWL Settings
All Bank Refresh to active/refresh cmd time
Average periodic refresh interval
requirements referred to in this material.
(0 °C<T
DDR3 SDRAM Speed Bins include tCK, tRCD, tRP, tRAS and tRC for each corresponding bin.
Bin (CL - tRCD - tRP)
CASE
Parameter
Speed
tRCD
tRRD
tFAW
Parameter
tRAS
≤95 °C, V
tRP
tRC
CL
Parameter
CL-nRCD-nRP
DDQ
Speed
= 1.5V ± 0.075V; V
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 5
CWL = 6
tREFI
DDR3-1066
13.13
13.13
50.63
7-7-7
37.5
37.5
min
7.5
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
7
Symbol
DD
tRCD
tRAS
tRP
tRC
tAA
85 °C < T
0 °C ≤ T
= 1.5V ± 0.075V)
Symbol
tRFC
24 of 33
CASE
CASE
≤ 85°C
≤ 95°C
DDR3-1333
13.125
13.125
13.125
50.625
1.875
1.875
37.5
min
2.5
9-9-9
13.5
13.5
49.5
min
6.0
36
30
9
1Gb
110
7.8
3.9
DDR3-1066
Reserved
Reserved
Reserved
7 - 7 - 7
6,7,8
5,6
2Gb
160
7.8
3.9
9*tREFI
DDR3-1600
max
<2.5
<2.5
3.3
11-11-11
20
-
-
-
13.75
13.75
48.75
min
Rev. 1.0 December 2008
6.0
11
35
30
4Gb
300
7.8
3.9
DDR3 SDRAM
8Gb
350
7.8
3.9
Units
nCK
nCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
tCK
ns
ns
ns
ns
ns
ns
Units
ns
µs
µs
1,2,3,6
1,2,3,4
1,2,3,4
Note
1,2,3
Note
8
4
4
Note
1