ppc405ex Applied Micro Circuits Corporation (AMCC), ppc405ex Datasheet - Page 72

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ppc405ex

Manufacturer Part Number
ppc405ex
Description
Powerpc 405ex Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet

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PPC405EX – PowerPC 405EX Embedded Processor
Revision Log
72
02/27/2007
03/01/2007
03/22/2007
04/24/2007
05/24/2007
06/04/2007
06/07/2007
06/28/2007
07/12/2007
08/21/2007
10/25/2007
11/20/2007
Date
Version
1.01
1.00
1.02
1.03
1.04
1.05
1.06
1.07
1.08
1.09
1.11
1.12
Initial creation of document.
Updates following review of initial document.
Change package drawing to eliminate confusion.
Expand system memory map.
Define FSource0 signal as Reserved.
Add Recommended Operating Conditions data.
Add thermal data.
Misc. updates and additions.
Misc. updates and additions including some limited timing data.
Correct one of three ball numbers assigned to PerData28.
Swap four balls between V
Swap one ball between OV
Correct typographical errors in Table 3.
Add missing alphabetical entries for PerAddr05, NAND Flash, and IIC1.
Add output current values to Tables 15 and 16.
Input various review comments.
Update Table 6 Notes column.
Update Block Diagram.
Swap SAV
Add two UART configurations.
Add DDR SDRAM section extracted from 460EX with changes appropriate for 405EX.
Update timing information for all interfaces.
Add power values.
Update I/O capacitance values.
Remove Confidential status.
Input various review comments.
Input review comments and corrections.
Change default signals for GPIO balls to GPIO00–GPIO27 signals.
Eliminate confusing terminology in initialization section.
Change voltage names so that SDRAM voltage is always SV
Six voltage pins originally labeled SV
Update GMCRefClk specifications (rise time, jitter, etc.)
Add I/O timing figures for RGMII signals.
Correct AMCC telephone numbers.
Change PerErr to always pull down.
Implement Doc Issue 374.
Change chip revision level from A to B (Doc issue 380).
Implement Doc Issue 381.
Revise I/O timing figures for RGMII signals.
Major updates to DDR SDRAM section (and other parts of the DS) (Doc Issue 392).
Add PCI-E I/O specifications.
I/O timing values updates.
Change boot-from-EBC support (Doc Issue 383).
Misc. updates.
Change all 667 MHz specs to 600 MHz.
DD
an EAV
DD
signal name assignments on package balls.
DD
DD
and GND.
and SV
Contents of Modification
DD
DD
changed to EOV
.
Preliminary Data Sheet
DD
.
DD
Revision 1.21 - July 9, 2008
for both DDR1 and DDR2 types.
AMCC Proprietary

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