LV8111V Sanyo Semiconductor Corporation, LV8111V Datasheet
LV8111V
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LV8111V Summary of contents
Page 1
... LV8111V Overview The LV8111V is a 3-phase brushless motor driver for polygon mirror motor driving of LBP. A circuit needed to drive of polygon mirror motor can be composed of a single-chip. Also, the output transistor is made DMOS by using BiDC process, and by adopting the synchronous rectification method, the lower power consumption (Heat generation) is achieved ...
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... V OL (FGFIL) External capacitor charge current I CHG 1 External capacitor discharge current I CHG 2 Amplitude V(FGFIL) * Design target value, Do not measurement. LV8111V Conditions Conditions In a stop state 35V -20mA Design target value * Sum of the lower and upper side ...
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... V IO (CLK) Hysteresis V IS (CLK) High level input current I IH (CLK) Low level input current I IL (CLK) * Design target value, Do not measurement. LV8111V Conditions 7mA PWM = 150pF C = 0.068µF, Design target value * -100µ 100µA ...
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... F/R pin High level input voltage V IH (FR) Low level input voltage V IL (FR) Input open voltage V IO (FR) High level input current I IH (FR) Low level input current I IL (FR) LV8111V Conditions V CSD = VREG V CSD = 0V V S/S = VREG V S/S =0V V BRSEL = VREG V BRSEL = 0V V F/R = VREG V F Ratings Unit ...
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... BOTTOM VIEW 23 (4.7) 22 0.2 SANYO : SSOP44K(275mil) Pd max -- Ta 2.0 Specified board: 114.3×76.1×1.6mm glass epoxy board. 1.7 1.5 1.0 0 Ambient temperature ° LV8111V 0.95 80 100 Top view No.A1416-5/13 ...
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... CSD CSD OSC BRSEL BRSEL S/S S/S F/R F/R LD output LD CLD LD MASK CLK input CLK CLK FG output FG FGFIL IN1 − IN1 + IN2 + LV8111V PWM PWM COUNT LOGIC OSC LOGIC COMP TSD LD PLL CNTROL CIRCUIT FG FILTER CURR HALL HYS AMP HB LIM IN2 − IN3 − IN3 + HB ...
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... By low level, short-circuit braking when the S/S pin stopped state. (Brake for the inspection process) 6 CSDSEL Motor constraint protection detection signal selection pin. Select FG with low, and LD with high open state. LV8111V Function VREG VREG Equivalent circuit VREG 55kΩ 5kΩ ...
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... PWM Pin to set the oscillation frequency of PWM. Connect a capacitor between this pin and GND Frequency characteristics correction pin of the current limiter circuit. Connect a capacitor between this pin and GND. LV8111V Function VREG VREG Equivalent circuit 55kΩ 5kΩ VREG 500Ω ...
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... EO Error amplifier output pin. 20 TOC Torque command voltage input pin. Normally, this pin must be connected with the EO pin. 21 GND Ground pin of the control circuit block. LV8111V Function VREG Equivalent circuit 15kΩ 500Ω VREG 500Ω 16 10kΩ VREG 500Ω ...
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... Charge pump output pin (Power supply for the upper side FET gate). Connect a capacitor between this pin and CP1 Pin to connect a capacitor for charge pump. 44 CP2 Connect a capacitor between CP1 and CP2. LV8111V Function 100Ω Equivalent circuit VREG ...
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... LD standard Low FG standard LV8111V Description 1. Speed Control Circuit This IC can realize a high efficiency, low-jitter, a stable rotation by adopting the PLL speed control method. This the PLL circuit compares the phase difference of the edge between the CLK signal and the FG signal and controls by using the output of error ...
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... The mask time (seconds) is 1.8 × C (µF) When a capacitor of 0.1µF is attached, the mask time becomes about 180ms. If the signals should be masked completely, the mask time must be set well in advance. When there is no need for masking, the CLD pin must be left open. LV8111V No.A1416-12/13 ...
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... This catalog provides information as of February, 2009. Specifications and information herein are subject This catalog provides information as of June, 2009. Specifications and information herein are subject to change without notice. to change without notice. LV8111V PS No.A1416-13/13 ...