m366s3323dts Samsung Semiconductor, Inc., m366s3323dts Datasheet - Page 7

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m366s3323dts

Manufacturer Part Number
m366s3323dts
Description
32mx64 Sdram Dimm Based On 16mx8, 4banks, 4k Refresh, 3.3v Synchronous Drams With Spd
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
REFER TO THE INDIVIDUAL COMPONENET, NOT THE WHOLE MODULE.
AC CHARACTERISTICS
Notes :
M366S3323DTS
CLK cycle
time
CLK to valid
output delay
Output data
hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
(AC operating conditions unless otherwise noted)
Symbol
t
t
t
t
SAC
t
t
t
t
t
SHZ
SLZ
CC
OH
CH
SS
SH
CL
Min
7.5
7.5
2.5
2.5
1.5
0.8
3
3
1
- 7C
1000
Max
5.4
5.4
5.4
5.4
Min
7.5
2.5
2.5
1.5
0.8
10
3
3
1
- 7A
1000
PC133/PC100 Unbuffered DIMM
Max
5.4
5.4
6
6
Min
10
10
3
3
3
3
2
1
1
- 1H
1000
Max
6
6
6
6
Rev. 0.1 Sept. 2001
Min
10
12
3
3
3
3
2
1
1
- 1L
1000
Max
6
7
6
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1,2
1
2
3
3
3
3
2

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