w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 60

• Manufacturer Part Number: w6692
• Description: Pci Bus Isdn S/t-controller
• Manufacturer: Winbond Electronics Corp America

bit comparisons with D_SAP1, D_SAP2 are disabled. Comparison with SAPG is always performed.
with C/R bit be masked. EA=0 for two octet address frame e.g LAPD, EA=1 for one octet address frame.
8.1.13 D_ch SAPI1 Register D_SAP1
Value after reset: 00H
value, SA11 is C/R bit and SA10 is zero.
8.1.14 D_ch SAPI2 Register D_SAP2
Value after reset: 00H
value, SA21 is C/R bit and SA20 is zero.
8.1.15 D_ch TEI Address Mask
Value after reset: 00H
corresponding bit comparisons with D_TEI1, D_TEI2 are disabled. Comparison with TEIG is always performed.
TAM7
SAM7
This register contains the first choice of the first byte address of received frame. For LAPD frame, SA17 - SA12 is the SAPI
This register masks(disables) the first byte address comparison of the incoming frame. If the mask bit is "1" the corresponding
Note : For the LAPD frame, the least significant two bits are the C/R bit and EA =0 bit. It is suggested that the comparison
This register contains the second choice of the first byte address of received frame. For LAPD frame, SA27 - SA22 is the SAPI
This register masks (disables) the second byte address comparison of the incoming frame. If the mask bit is "1" the
Note : For the LAPD frame, the least significant bit is the EA =1 bit.
SA17
SA27
7
7
7
TAM6
SAM6
SA16
SA26
6
6
6
TAM5
SAM5
SA15
SA25
5
5
5
TAM4
SAM4
SA14
SA24
4
4
4
TAM3
SAM3
SA13
SA23
D_TAM
3
3
3
Read/Write Address 30H/0CH
Read/Write Address 34H/0DH
TAM2
SAM2
SA12
SA22
2
2
2
-60 -
Read/Write Address 38H/0EH
TAM1
SAM1
SA11
SA21
1
1
1
TAM0
SAM0
SA10
SA20
0
0
0
W6692 PCI ISDN S/T-Controller
Publication Release Date:
Preliminary Data Sheet
Sep 30, 1999
Revision 0.9