hcts193ms Intersil Corporation, hcts193ms Datasheet - Page 8

• Manufacturer Part Number: hcts193ms
• Description: Rad-hard Synchronous 4-bit Up/down Counter
• Manufacturer: Intersil Corporation

AC Timing Diagrams
PN
PL
QN
AC Timing Diagrams
CPU OR CPD
CPU
CPD
VCC
VIH
VS
VIL
GND
FIGURE 1. CLOCK TO OUTPUT DELAYS AND CLOCK PULSE
FIGURE 3. PARALLEL LOAD PULSE WIDTH, PARALLEL
FIGURE 5. SETUP AND HOLD TIMES DATA TO PARALLEL
OR
QN
PN
PL
PARAMETER
TSU(H)
TPLH
Q = p
QN
VS
WIDTH
LOAD TO OUTPUT DELAYS, AND PARALLEL
LOAD TO CLOCK RECOVERY TIME
LOAD (PL)
TH
VS
VS
VS
TW
AC VOLTAGE LEVELS
TPHL
VS
VS
VS
VS
I/FMAX
HCTS
4.50
3.00
1.30
0
0
VS
TW
TW
TH
VS
VS
Q = p
TPLH
VS
VS
TPHL
VS
INPUT LEVEL
TSU(L)
VS
UNITS
INPUT LEVEL
INPUT LEVEL
VS
TREC
V
V
V
V
V
INPUT
LEVEL
HCTS193MS
INPUT
LEVEL
INPUT
LEVEL
599
AC Load Circuit
CPU OR CPD
VOH
VOL
CPU OR CPD
TCU OR TCD
FIGURE 4. MASTER RESET PULSE WIDTH, MASTER RESET
MR
QN
FIGURE 2. CLOCK TO TERMINAL COUNT DELAYS
TPHL
FIGURE 6. OUTPUT TRANSITION TIME
TO OUTPUT DELAY AND MASTER RESET TO
CLOCK RECOVERY TIME
VS
DUT
CL = 50pF
RL = 500
VS
CL
TTLH
VS
TPHL
20%
TW
VS
TREC
80%
VS
OUTPUT
RL
Spec Number
VS
TEST
POINT
VS
80%
VS
INPUT LEVEL
INPUT LEVEL
INPUT LEVEL
TPLH
20%
TTHL
518620