hcts75ms Intersil Corporation, hcts75ms Datasheet
hcts75ms
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hcts75ms Summary of contents
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... The HCTS75MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radia- tion hardened, high-speed, CMOS/SOS Logic Family. The HCTS75MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART TEMPERATURE ...
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... VCC = 4.5V, VIH = 2.25V, Functional Test VIL = 0.8V (Note 2) NOTES: 1. All voltages referenced to device GND. 2. For functional tests VO 4.0V is recognized as a logic “1”, and VO Specifications HCTS75MS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . 25mA Maximum Package Power Dissipation at +125 SBDIP Package ...
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... The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Specifications HCTS75MS GROUP (NOTES 1, 2) ...
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... AC measurements assume RL = 500 , CL = 50pF, Input 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic “1”, and VO TABLE 5. BURN-IN AND OPERATING LIFE DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH Specifications HCTS75MS (NOTE 1) CONDITIONS TEMPERATURE 0.5V is recognized as a logic “0”. GROUP B SUBGROUP ...
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... Each pin except VCC and GND will have a resistor of 1K OPEN 14, 15, 16 NOTE: Each pin except VCC and GND will have a resistor of 47K E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCTS75MS TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS 100%/5004 ...
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... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCTS75MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...
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... TW = Pulse Width Pulse Width, Setup, Hold Timing Diagram Negative Edge Trigger and Load Circuit TW INPUT VIH VS VIL TH TSU INPUT CP TW VIH VS VIL TH = Hold Time TSU = Setup Time TW = Pulse Width HCTS75MS TPHL TTHL PARAMETER 80% VCC 20% VIH VS VIL GND PARAMETER VCC VIH VS VIL GND ...
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... (4) VCC ( ( (7) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS75 is TA14442A. HCTS75MS HCTS75MS (2) (1) (16) (8) ...
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... For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 HCTS75MS EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ...