s5920 Applied Micro Circuits Corporation (AMCC), s5920 Datasheet - Page 40
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s5920
Manufacturer Part Number
s5920
Description
Pci Product
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
1.S5920.pdf
(165 pages)
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S5920 – PCI Product: PCI Configuration Registers
Each PCI bus device contains a unique 256-byte region called its configuration header space. Portions of this con-
figuration header are mandatory in order for a PCI agent to be in full compliance with the PCI specification. This
section describes each of the configuration space fields—its address, default values, initialization options, and bit
definitions—and also provides an explanation of its intended usage.
Table 21. Configuration Registers
1. BADR 5 is not implemented in the S5920.
AMCC Confidential and Proprietary
Address Offset
2Ch–2Dh
2Eh–2Fh
00h–01h
02h–03h
04h–05h
06h–07h
09h–0Bh
10h–27h
30h–33h
34h–3Bh
40h–FFh
28h–2Bh
0Ch
0Dh
0Eh
3Ch
3Dh
3Eh
8h0
0Fh
3Fh
BADR0-BADR5
Abbreviation
PCICMD
MINGNT
MAXLAT
PCISTS
INTPIN
XROM
INTLN
CLCD
CALN
SVID
HDR
BIST
LAT
VID
DID
RID
SID
–
–
–
Vendor Identification Register
Device Identification Register
Command Register
Status Register
Revision Identification Register
Class Code Register
Cache Line Size Register
Latency Timer Register
Header Type Register
Built-in Self-test Register
Base Address Registers (0-5)1
Reserved
Subsystem Vendor Identification Register
Subsystem Identification Register
Expansion ROM Base Address Register
Reserved
Interrupt Line Register
Interrupt Pin Register
Minimum Grant Register
Maximum Latency Register
Not used
Register Name
Revision 1.02 – April 12, 2007
Data Book
DS1596
40
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