w39l010 Winbond Electronics Corp America, w39l010 Datasheet - Page 5

• Manufacturer Part Number: w39l010
• Description: 128k X 8 Cmos Flash Memory
• Manufacturer: Winbond Electronics Corp America

6. FUNCTIONAL DESCRIPTION
6.1 Device Bus Operation
6.1.1
The read operation of the W39L010 is controlled by #CE and #OE, both of which have to be low for
the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip
is de-selected and only standby power will be consumed. #OE is the output control and is used to
gate data from the output pins. The data bus is in high impedance state when either #CE or #OE is
high. Refer to the timing waveforms for further details.
6.1.2
Device erasure and programming are accomplished via the command register. The contents of the
register serve as inputs to the internal state machine. The state machine outputs dictate the function
of the device.
The command register itself does not occupy any addressable memory location. The register is a
latch used to store the commands, along with the address and data information needed to execute the
command. The command register is written to bring #WE to logic low state, while #CE is at logic low
state and #OE is at logic high state. Addresses are latched on the falling edge of #WE or #CE,
whichever happens later; while data is latched on the rising edge of #WE or #CE, whichever happens
first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing
parameters.
6.1.3
There are two ways to implement the standby mode on the W39L010 device, both using the #CE pin.
A CMOS standby mode is achieved with the
is typically reduced to less than 20 PA. A TTL standby mode is achieved with the #CE pin held at V
Under this condition the current is typically reduced to 2 mA.
In the standby mode the outputs are in the high impedance state, independent of the #OE input.
6.1.4
With the #OE input at a logic high level (V
output pins to be in a high impedance state.
6.1.5
The auto-select mode allows the reading of a binary code from the device and will identify its
manufacturer and type. This mode is intended for use by programming equipment for the purpose of
automatically matching the device to be programmed with its corresponding programming algorithm.
This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force V
A9. Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from
V
IL
to V
IH
Read Mode
Write Mode
Standby Mode
Output Disable Mode
Auto-select Mode
. All addresses are donct cares except A0 and A1 (see "Auto-select Codes").
#CE input held at V
IH
), output from the device is disabled. This will cause the
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Publication Release Date: January 9, 2004
r0.3V. Under this condition the current
ID
(11.5V to 12.5V) on address pin
W39L010
Revision A4
IH
.