w39l010 Winbond Electronics Corp America, w39l010 Datasheet - Page 6

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w39l010

Manufacturer Part Number
w39l010
Description
128k X 8 Cmos Flash Memory
Manufacturer
Winbond Electronics Corp America
Datasheet

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The manufacturer and device codes may also be read via the command register, for instance, when
the W39L010 is erased or programmed in a system without access to high voltage on the A9 pin. The
command sequence is illustrated in "Auto-select Codes".
Byte 0 (A0 = V
device identifier code (W39L010 = 31H). All identifiers for manufacturer and device will exhibit odd
parity with DQ7 defined as the parity bit. In order to read the proper device codes when executing the
Auto-select, A1 must be low state.
6.2 Data Protection
The W39L010 is designed to offer protection against accidental erasure or programming caused by
spurious system level signals that may exist during power transitions. During power up the device
automatically resets the internal state machine in the Read mode. Also, with its control register
architecture, alteration of the memory contents only occurs after successful completion of specific
multi-bus cycle command sequences. The device also incorporates several features to prevent
inadvertent write cycles resulting from V
6.2.1
There are two alternatives to set the boot block. The 8K-byte in the top/bottom location of this device
can be locked as boot block, which can be used to store boot codes. It is located in the last 8K bytes
or first 8K bytes of the memory with the address range from 1E000(hex) to 1FFFF(hex) for top location
or 00000(hex) to 01FFF(hex) for bottom location.
See Command Codes for Boot Block Lockout Enable for the specific code. Once this feature is set the
data for the designated block cannot be erased or programmed (programming lockout), other memory
locations can be changed by the regular programming method.
In order to detect whether the boot block feature is set on the first/last 8K-byte block or not, users can
perform software command sequence: enter the product identification mode (see Command Codes
for Identification/Boot Block Lockout Detection for specific code), and then read from address
0002(hex) for first(bottom) location or 1FFF2(hex) for last(top) location. If the DQ0/DQ1 of output
data is "1," the 8Kbytes boot block programming lockout feature will be activated; if the DQ0/DQ1 of
output data is "0," the lockout feature will be inactivated and the block can be erased/programmed.
To return to normal operation, perform a three-byte command sequence (or an alternate single-byte
command) to exit the identification mode. For the specific code, see Command Codes for
Identification/Boot Block Lockout Detection.
6.2.2
Noise pulses of less than 10 nS (typical) on #OE, #CE, or #WE will not initiate a write cycle.
6.2.3
Writing is inhibited by holding any one of #OE = V
#CE and #WE must be a logical zero while #OE is a logical one.
6.2.4
Power-up of the device with #WE = #CE = V
edge of #WE except 5mS delay (see the power up timing in AC Characteristics). The internal state
machine is automatically reset to the read mode on power-up.
Boot Block Operation
Write Pulse "Glitch" Protection
Logical Inhibit
Power-up Write Inhibit
IL
) represents the manufacturercs code (Winbond = DAH) and byte 1 (A0 = V
DD
power-up and power-down transitions or system noise.
IL
and #OE = V
- 6 -
IL
, #CE = V
IH
IH
will not accept commands on the rising
, or #WE = V
IH
. To initiate a write cycle
W39L010
IH
) the

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