lc89052t Sanyo Semiconductor Corporation, lc89052t Datasheet - Page 29
lc89052t
Manufacturer Part Number
lc89052t
Description
Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
1.LC89052T.pdf
(42 pages)
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9.5 Input/Output Timing
In the output timing shown in figure 9.4, data is allocated so that there are no problems even if the output register
DO0 is not read. See the read register table for details.
DO
CE
CL
DO
DO
DO
CE
CE
CE
DI
CL
CL
CL
DI
DI
DI
Figure 9.4 Output Timing Chart (Normal high clock. It is necessary to read DO0 with a port.)
B0
B0
B0
B0
B1
Hi-Z
B1 B2
Hi-Z
B1 B2
Hi-Z
B1
Hi-Z
B2 B3 A0
B2
Figure 9.3 Output Timing Chart (Normal low clock)
Figure 9.2 Input Timing Chart (Normal high clock)
Figure 9.1 Input Timing Chart (Normal low clock)
B3 A0 A1
B3 A0 A1
B3
A0
A1 A2
A1
A2
A2 A3
A2
A3
LC89052T
A3
A3
DI0
DO0
DO0
DI0
DO1 DO2 DO3 DO4 . . . .
DI1 DI2
DI1 DI2
DO1 DO2 DO3 DO4 . . . .
DI3 DI4
DI3 DI4
DI5
DI5
. . . .
. . . . . . . .
. . . .
. . . .
DI15
DI15
DOn
DOn
No.7457-29/42
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