w65c816s Western Design Center, Inc., w65c816s Datasheet - Page 42

• Manufacturer Part Number: w65c816s
• Description: W65c816s 8/16?bit Microprocessor
• Manufacturer: Western Design Center, Inc.

16a. Direct, X d,x
ADC, AND, BIT, CMP, EOR, LDA
LDY, ORA, SBC, STA, STY, STZ,
12 OpCodes,2 bytes, 4,5,and 6
cycles
16b. Direct, X (R-M-W) d,x
ASL, DEC, INC, LSR, ROL, ROR,
6 OpCodes, 2 bytes, 6,7,8 and 9
cycles
17. Direct, Y d,y
LDX, STX
2 OpCodes, 2 bytes, 4,5 and 6
cycles
18.Immediate #
ADC, AND, BIT, CMP, CPX, CPY,
EOR, LDA, LDX, LDY, ORA, REP,
SEC, SEP
14 OpCodes, 2 and 3 bytes, 2 and
3 cycles
19a. Implied i
CLC, CLD, CLI, CLV, DEX, DEY,
INX, INY, NOP, SEC, SED, SEI,
TAX, TAY, TCD, TCS, TDC, TSC,
TSX, TXA, TXS, TXY, TYA, TYX,
XCE
25 OpCodes, 1 byte, 2 cycles
19b. Implied i
XBA
1 OpCode, 1 byte, 3 cycles
19c. Stop the Clock
STP
1 OpCode
3 cycles
(See
Interrupt)
19d. Wait for Interrupt
WAI
1 OpCode,1 byte
3 cycles
1 byte
22a.
Address Mode
Stack
RESB=1
IRQB, NMIB
RESB=0
Hardware
RESB=0
RESB=1
(2)
(1)
(2)
(1)
(3),(17
)
(1)
(2)
(1)
(1)(6)
(9)RDY=1
Note
RDY=1
RDY=0
RDY=1
1
2
2a
3
4
4a
1
2
2a
3
4
4a
5
6a
6
1
2
2a
3
4
4a
1
2
2a
1
2
1
2
3
1
2
3
1c
1b
1a
1
1
2
3
1
Cycle
Table 5-7 (continued)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VPB
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
MLB
1
0
0
0
1
1
1
0
0
0
1
1
0
1
1
1
0
0
0
1
1
1
0
0
1
0
1
0
0
1
0
0
0
0
0
1
1
0
0
1
VDA
(14)
1
1
0
0
0
0
1
1
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
1
0
0
1
0
0
0
0
0
1
1
0
0
1
VPA
(14)
PBR,PC
PBR,PC+1
PBR,PC+1
PBR,PC+1
0,D+DO+X
0,D+DO+X+1
PBR,PC
PBR,PC+1
PBR,PC+1
PBR,PC+1
0,D+DO+X
0,D+DO+X+1
0,D+DO+X+1
0,D+DO+X+1
0,D+DO+X
PBR,PC
PBR,PC+1
PBR,PC+1
PBR,PC+1
0,D+DO+Y
0,D+DO+Y+1
PBR,PC
PBR,PC+1
PBR,PC+2
PBR,PC
PBR,PC+1
PBR,PC
PBR,PC+1
PBR,PC+1
PBR,PC
PBR,PC+1
PBR,PC+1
PBR,PC+1
PBR,PC+1
PBR,PC+1
PBR,PC+1
PBR,PC
PBR,PC+1
PBR,PC+1
PBR,PC+1
Address Bus
(15)
OpCode
DO
IO
IO
Data Low
Data High
OpCode
DO
IO
IO
Data Low
Data High
IO
Data High
Data Low
OpCode
DO
IO
IO
Data Low
Data High
OpCode
IDL
IDH
OpCode
IO
OpCode
IO
IO
OpCode
IO
IO
RES (BRK)
RES (BRK)
RES (BRK)
BEGIN
OpCode
IO
IO
IRQ(BRK)
Data Bus
42
1
1
1
1
1/0
1/0
1
1
1
1
1
1
1
0
0
1
1
1
1
1/0
1/0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
RWB