LS403_SOT-23 MICROSS [Micross Components], LS403_SOT-23 Datasheet

LS403_SOT-23

Manufacturer Part Number

LS403_SOT-23

Description

a Low Noise, Low Drift, Monolithic Dual N-Channel JFET

Manufacturer

MICROSS [Micross Components]

Datasheet

1.LS403_SOT-23.pdf (1 pages)

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Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired

ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or

other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.

The LSU403 is a high-performance monolithic dual

JFET featuring extremely low noise, tight offset voltage

and low drift over temperature specifications, and is

targeted for use in a wide range of precision

instrumentation applications. The LSU403 features a 5-

mV offset and 10-µV/°C drift. The LSU403 is a direct

replacement for discontinued Siliconix LSU403.

The 6 Pin SOT-23 provides a low cost option and ease

of manufacturing.

(See Packaging Information).

LSU403 Applications:

Available Packages:

LSU403 in SOT-23

LSU403 available as bare die

Please contact

DSS1‐2

SYMBOL

‐I

FS1‐2

‐I

(off) or V

GSS

CMR

max.

DSS

OSS

RSS

fSS

(on)

max.

GGO

ISS

GSS

/ Y

/ I

DSS

Wideband Differential Amps

High-Speed,Temp-Compensated Single-Ended

Input Amps

High-Speed Comparators

Impedance Converters and vibrations detectors.

Click To Buy

The LSU403 is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET

Micross

Linear Systems replaces discontinued Siliconix U403

COMMON MODE REJECTION

Mismatch at Full Conduction

Gate‐To‐Gate Breakdown

OUTPUT CONDUCTANCE

TRANSCONDUCTANCE

‐20 log | V

Breakdown Voltage

At Full Conduction

CHARACTERISTICS

High Temperature

Typical Operation

DRAIN CURRENT

Operating Range

Reverse Transfer

for full package and die dimensions

Pinchoff voltage

GATE CURRENT

Full Conduction

GATE VOLTAGE

Full Conduction

CAPACITANCE

Operating

Mismatch

Voltage

NOISE

Figure

Input

GS1‐2

/ V

2000

1000

MIN.

±50

‐0.5

0.5

‐‐

LOW NOISE, LOW DRIFT

MONOLITHIC DUAL

N-CHANNEL JFET

FEATURES

LOW DRIFT

LOW NOISE

LOW PINCHOFF

ABSOLUTE MAXIMUM RATINGS

@ 25°C (unless otherwise noted)

Maximum Temperatures

Storage Temperature

Operating Junction Temperature

Maximum Voltage and Current for Each Transistor – Note 1

‐V

‐I

Maximum Power Dissipation

Device Dissipation @ Free Air – Total 300mW

MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED

SYMBOL

| V

TYP.

0.6

0.2

G(f)

‐4

‐‐

LSU403

GSS

DSO

GS1‐2

/ T| max.

| max.

MAX.

7000

2000

‐2.5

‐2.3

100

‐15

‐10

0.5

1.5

‐‐

Gate Voltage to Drain or Source

Drain to Source Voltage

Gate Forward Current

CHARACTERISTICS

OFFSET VOLTAGE

TEMPERATURE

DRIFT VS.

nV/√Hz

UNITS

µmho

Micross Components Europe

Tel: +44 1603 788967

Email:

Web:

http://www.micross.com/distribution

chipcomponents@micross.com

| V

VALUE UNITS

= 6nV/Hz @ 10Hz TYP.

= 2.5V TYP.

= +125°C

=15V I

GS1‐2

= 1nA I

= 15V I

= 10V V

= 15V V

f= 100Hz NBW= 6Hz

/ T| = 10µV/°C TYP.

= 10 to 20V I

µV/°C

= 15V I

= 15V T

=15V I

= 10V V

=200µA f=10Hz NBW=1Hz

= 0 I

CONDITIONS

= 15V I

‐65°C to +150°C

+150°C

50V

10mA

= 200µA f= 1MHz

= 200µA f = 1kHz

= 0V R

CONDITIONS

= 0V f = 1kHz

= 0 I

= 200µA

=‐55°C to +125°C

=10V, I

= +125°C

= 500µA

=1nA

= 1nA

=200µA

=30µA

= 0V

= 10M

=200µA

= 0

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