S1D13305D00A EPSON [Epson Company], S1D13305D00A Datasheet - Page 20

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S1D13305D00A

Manufacturer Part Number
S1D13305D00A
Description
LCD Controller ICs
Manufacturer
EPSON [Epson Company]
Datasheet
SPECIFICATIONS
14
Note: VD0 to VD7 are latching input/outputs. While the bus is high impedance, VD0 to VD7 retain the write data until the data read
T
EXT 0
VD0 to
Signal Symbol
VA0 to
a
VA15
VWR
VCE
VD7
= –20 to 75 C
from the memory is placed on the bus.
t
t
t
t
t
t
t
t
t
CYW
WSC
WHC
t
AHC
t
DSC
DHC
ASC
t
DH2
AH2
t
t
CE
CA
AS
W
C
Clock period
VCE HIGH-level
pulsewidth
VCE LOW-level
pulsewidth
Write cycle time
Address hold time from
falling edge of VCE
Address setup time to
falling edge of VCE
Address hold time from
rising edge of VCE
Address setup time to
falling edge of VWR
Address hold time from
rising edge of VWR
Write setup time to
falling edge of VCE
Write hold time from
falling edge of VCE
Data input setup time to
falling edge of VCE
Data input hold time
from falling edge of VCE
Data hold time from
rising edge of VWR
Parameter
2t
2t
2t
2t
V
t
t
t
t
C
C
C
C
DD
C
C
C
C
Min.
100
EPSON
3t
10
– 50
– 70
– 80
– 85
0
0
5
– 30
– 30
– 20
– 30
C
= 4.5 to 5.5V V
Max.
50
2t
2t
t
t
2t
t
2t
t
C
C
C
C
DD
Min.
C
C
C
C
125
3t
– 110
– 115
– 125
10
– 50
0
0
5
– 30
– 40
– 20
– 30
C
= 2.7 to 4.5V
Max.
50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
S1D13305 Series
Technical Manual
Condition
CL = 100
pF

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