BR25H010-W ROHM [Rohm], BR25H010-W Datasheet - Page 3

• Manufacturer Part Number: BR25H010-W
• Manufacturer: ROHM [Rohm]

●Pin assignment and description
●Operating timing characteristics
●AC measurement conditions
(Ta=-40~+125°C, unless otherwise specified, load capacity C
SCK frequency
SCK high time
SCK low time
CSB high time
CSB setup time
CSB hold time
SCK setup time
SCK hold time
SI setup time
SI hold time
Data output delay time1
Data output delay time1
(C
Output hold time
Output disable time
HOLDB setting
setup time
HOLDB setting
hold time
HOLDB release
setup time
HOLDB release
hold time
Time from HOLDB
to output High-Z
Time from HOLDB
To output change
SCK rise time
SCK fall time
OUTPUT
rise time
OUTPUT
fall time
Write time
Fig.2 Pin assignment diagram
Load capacity 1
Load capacity 2
Input rise time
Input fall time
Input voltage
Input / Output judgment voltage
Vcc
CSB
L2
=30pF)
Parameter
HOLDB SCK
BR25H010-W
BR25H020-W
BR25H040-W
BR25H080-W
BR25H160-W
BR25H320-W
SO
Parameter
WPB
GND
Ж
Ж
Ж
Ж
SI
1
1
1
1
tSCKWH
tSCKWL
Symbol
tSCKH
tSCKS
fSCK
tCSS
tCSH
tHFH
tHRS
tHRH
tHOZ
tHPD
tPD1
tPD2
tHFS
tE/W
tDIS
tDIH
tOH
tRC
tRO
tCS
tOZ
tFC
tFO
Terminal name
Symbol
Min.
HOLDB
85
85
85
90
85
90
90
20
30
40
70
–
–
–
0
–
0
0
–
–
–
–
–
–
–
2.5≤Vcc≤5.5V
GND
WPB
C
C
CSB
SCK
Vcc
SO
–
–
–
–
SI
L1
L2
Ж
Typ. Max
1 NOT 100% TESTED
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Min.
–
–
–
–
0.2Vcc/0.8Vcc
0.3Vcc/0.7Vcc
Input/Output
100
100
70
55
70
50
50
5
–
–
–
–
–
–
–
–
–
–
–
1
1
5
–
–
–
Limits
Output
Typ.
Input
Input
Input
Input
Input
–
–
–
–
–
–
3/16
MHz
Unit
L1
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
ns
ns
=100pF)
Max
100
30
50
50
Power source to be connected
All input / output reference voltage, 0V
Chip select input
Serial clock input
Start bit, ope code, address, and serial data input
Serial data output
Hold input
Command communications may be suspended temporarily
(HOLD status)
Write protect input
Write command is prohibited
Write status register command is prohibited.
Unit
pF
pF
ns
ns
V
V
SI is taken into IC inside in sync with data rise edge of SCK.
Input address and data from the most significant bit MSB.
SO is output in sync with data fall edge of SCK. Data is output
from the most significant bit MSB.
SCK
SCK
CSB
SO
CSB
SO
SI
SI
HOLDB
CSB
SCK
SI
SO
"H"
"L"
tSCKS
tCS
●
Dn+1
n+1
Fig.5 HOLD timing
Function
tPD
Fig.3 Input timing
Fig.4 Input / Output timing
tHFS tHFH
tCSS
Sync data input / output
timing
*1
tHOZ
Dn
tOH
High-Z
High-Z
tSCKWL
tDIS tDIH
tHRS tHRH
*1:BR25H010/020/040-W
tSCKWH
tRO,tFO
tCSH tSCKH
tHPD
tDIS
n
tOZ
Dn
tCS
tRC
High-Z
n-1
tFC
Dn-1