A40MX02-PL208A ACTEL [Actel Corporation], A40MX02-PL208A Datasheet - Page 11
A40MX02-PL208A
Manufacturer Part Number
A40MX02-PL208A
Description
40MX and 42MX Automotive FPGA Families
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A40MX02-PL208A.pdf
(78 pages)
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Figure 1-11 • Silicon Explorer II Setup with 40MX
Figure 1-12 • Silicon Explorer II Setup with 42MX
Table 1-2 • Device Configuration Options for Probe Capability
Security Fuse(s) Programmed
No
No
Yes
Notes:
1. Avoid using SDI, SDO, DCLK, PRA, and PRB pins as input or bidirectional ports. Since these pins are active during probing, input
2. If no user signal is assigned to these pins, they will behave as unused I/Os in this mode. See the
signals will not pass through these pins and may cause contention.
page 1-45
for information on unused I/O pins.
Serial Connection
to Windows PC
Serial Connection
to Windows PC
16 Logic Analyzer Channels
16 Logic Analyzer Channels
MODE
HIGH
LOW
–
Explorer II
Explorer II
Silicon
Silicon
v3.1
PRB
PRB
PRA
Probe Circuit Outputs
Probe Circuit Secured
MODE
DCLK
SDO
PRA
SDI
MODE
DCLK
SDO
SDI
PRA, PRB
User I/Os
40MX and 42MX Automotive FPGA Families
2
1
42MX
40MX
"Pin Descriptions" section on
Probe Circuit Secured
SDI, SDO, DCLK
Probe Circuit Inputs
User I/Os
2
1
1-7
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