AD660SQ/883B AD [Analog Devices], AD660SQ/883B Datasheet

AD660SQ/883B

Manufacturer Part Number

AD660SQ/883B

Description

Monolithic 16-Bit Serial/Byte DACPORT

Manufacturer

AD [Analog Devices]

Datasheet

1.AD660SQ883B.pdf (12 pages)

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PRODUCT DESCRIPTION

The AD660 DACPORT is a complete 16-bit monolithic D/A

converter with an on-board voltage reference, double buffered

latches and output amplifier. It is manufactured on Analog De-

vices’ BiMOS II process. This process allows the fabrication of

low power CMOS logic functions on the same chip as high pre-

cision bipolar linear circuitry.

The AD660’s architecture ensures 15-bit monotonicity over

time and temperature. Integral and differential nonlinearity is

maintained at 0.003% max. The on-chip output amplifier pro-

vides a voltage output settling time of 10 s to within 1/2 LSB

for a full-scale step.

The AD660 has an extremely flexible digital interface. Data can

be loaded into the AD660 in serial mode or as two 8-bit bytes.

This is made possible by two digital input pins which have dual

functions. The serial mode input format is pin selectable to be

MSB or LSB first. The serial output pin allows the user to daisy

chain several AD660s by shifting the data through the input

latch into the next DAC thus minimizing the number of control

lines required to SIN, CS and LDAC. The byte mode input for-

mat is also flexible in that the high byte or low byte data can be

loaded first. The double buffered latch structure eliminates data

skew errors and provides for simultaneous updating of DACs in

a multi-DAC system.

The AD660 is available in five grades. AN and BN versions are

specified from –40 C to +85 C and are packaged in a 24-pin

300 mil plastic DIP. AR and BR versions are also specified from

–40 C to +85 C and are packaged in a 24-pin SOIC. The SQ

version is packaged in a 24-pin 300 mil cerdip package and is

also available compliant to MIL-STD-883. Refer to the AD660/

883B data sheet for specifications and test conditions.

DACPORT is a registered trademark of Analog Devices, Inc.

REV. A

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

FEATURES

Complete 16-Bit D/A Function

15-Bit Monotonic over Temperature

Microprocessor Compatible

Asynchronous Clear (to 0 V) Function

Serial Output Pin Facilitates Daisy Chaining

Unipolar or Bipolar Output

Low Glitch: 15 nV-s

Low THD+N: 0.009%

1 LSB Integral Linearity

On-Chip Output Amplifier

On-Chip Buried Zener Voltage Reference

Serial or Byte Input

Double Buffered Latches

Fast (40 ns) Write Pulse

PRODUCT HIGHLIGHTS

1. The AD660 is a complete 16-bit DAC, with a voltage refer-

2. The internal buried Zener reference is laser trimmed to

3. The output range of the AD660 is pin programmable and can

4. The AD660 is both dc and ac specified. DC specifications

5. The double buffered latches on the AD660 eliminate data

6. The CLEAR function can asynchronously set the output to

7. The output amplifier settles within 10 s to 1/2 LSB for a

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 617/329-4700

REF IN

LDAC

ence, double buffered latches and output amplifier on a sin-

gle chip.

10.000 volts with a 0.1% maximum error and a tempera-

ture drift performance of 15 ppm/ C. The reference is

available for external applications.

be set to provide a unipolar output range of 0 V to +10 V or

a bipolar output range of –10 V to +10 V. No external com-

ponents are required.

include 1 LSB INL and 1 LSB DNL errors. AC specifi-

cations include 0.009% THD+N and 83 dB SNR.

skew errors and allow simultaneous updating of DACs in

multi-DAC applications.

0 V regardless of whether the DAC is in unipolar or bipolar

mode.

full-scale step and within 2.5 s for a 1 LSB step over tem-

perature. The output glitch is typically 15 nV-s when a full-

scale step is loaded.

HBE

SER

CLR

UNI/BIP CLR/

LBE

CONTROL

FUNCTIONAL BLOCK DIAGRAM

LOGIC

10k

REF OUT

+10V REF

Serial/Byte DACPORT

DB0

SIN/

16-BIT LATCH

16-BIT DAC

MSB/LSB/

DB1

Monolithic 16-Bit

–V

DB7

AD660

10.05k

10k

DGND

AD660

Fax: 617/326-8703

AGND

SPAN/

BIP

OFFSET

OUT

Related parts for AD660SQ/883B

AD660SQ/883B Summary of contents

Page 1

FEATURES Complete 16-Bit D/A Function On-Chip Output Amplifier On-Chip Buried Zener Voltage Reference 1 LSB Integral Linearity 15-Bit Monotonic over Temperature Microprocessor Compatible Serial or Byte Input Double Buffered Latches Fast (40 ns) Write Pulse Asynchronous Clear (to 0 ...

Page 2

AD660–SPECIFICATIONS Parameter RESOLUTION DIGITAL INPUTS ( MIN MAX V (Logic “1” (Logic “0” TRANSFER FUNCTION CHARACTERISTICS Integral Nonlinearity T ...

Page 3

AC PERFORMANCE CHARACTERISTICS Ratio, these characteristics are included for design guidance only and are not subject to test. THD+N and SNR are 100% tested + – MIN A MAX ...

Page 4

... C to +85 C AD660AR – +85 C AD660BN – +85 C AD660BR – +85 C AD660SQ – +125 C AD660SQ/883B** – +125 Plastic DIP Cerdip SOIC. **Refer to AD660/883B military data sheet. TIMING CHARACTERISTICS Parameter Limit +25 C (Figure la ...

Page 5

BIT0 t SER SS BIT1 "1" = MSB FIRST, "0" = LSB FIRST CS LDAC CLR LBE Figure 1c. Asynchronous Clear to Bipolar or Unipolar Zero BIT0 SER BIT 1 (MSB/LSB) CS SERIAL OUT DEFINITIONS OF SPECIFICATIONS INTEGRAL NONLINEARITY: Analog ...

Page 6

AD660 SIGNAL-TO-NOISE RATIO: The signal-to-noise ratio is de- fined as the ratio of the amplitude of the output when a full- scale signal is present to the output with no signal present. This is measured in dB. DIGITAL-TO-ANALOG GLITCH IMPULSE: ...

Page 7

BIPOLAR CONFIGURATION The circuit shown in Figure 4a will provide a bipolar output voltage from –10.000000 V to +9.999694 V with positive full scale occurring with all bits ON the unipolar mode, resis- tors R1 and R2 may ...

Page 8

AD660 Figure 5 shows the AD660 using the AD586 precision 5 V refer- ence in the bipolar configuration. The highest grade AD586MN is specified with a drift of 2 ppm/ C which is a 7.5 improve- ment over the AD660’s ...

Page 9

OUTPUT SETTLING AND GLITCH The AD660’s output buffer amplifier typically settles to within 0.0008% FS (1/2 LSB) of its final value for a full-scale step. Figures 7a and 7b show settling for a full-scale and an LSB ...

Page 10

AD660–Microprocessor Interface Section AD660 TO MC68HC11 (SPI BUS) INTERFACE The AD660 interface to the Motorola SPI (serial peripheral in- terface) is shown in Figure 8. The MOSI, SCK, and SS pins of the HC11 are respectively connected to the BIT0, ...

Page 11

The address decoder analyzes the input-output address pro- duced by the processor to select the function to be performed by the AD660, qualified by the coincidence of the Input-Output Request (IORQ*) and Write (WR*) pins. The least significant address bit ...

Page 12

AD660 GROUNDING The AD660 has two pins, designated analog ground (AGND) and digital ground (DGND.) The analog ground pin is the “high quality” ground reference point for the device. Any exter- nal loads on the output of the AD660 should ...

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