km62256c Samsung Semiconductor, Inc., km62256c Datasheet - Page 5

• Manufacturer Part Number: km62256c
• Description: 32kx8 Bit Low Power Cmos Static Ram
• Manufacturer: Samsung Semiconductor, Inc.

A
DATA RETENTION CHARACTERISTICS
KM62256C Family
AC OPERATING CONDITIONS
Read
Write
TEST CONDITIONS
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Input pulse level : 0.8 to 2.4V
Input rising and falingl time : 5ns
input and output reference voltage : 1.5V
Output load (See right) :C
C CHARACTERISTICS
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Item
(Test Load and Test Input/Output Reference)
Parameter List
L
=100pF+1TTL
KM62256CI Family : T
(Vcc=4.5~5.5V, KM62256C Family : T
V
I
t
t
DR
SDR
RDR
DR
KM62256CL
KM62256CL-L
KM62256CLE
KM62256CLE-L
KM62256CLI
KM62256CLI-L
Symbol
A
=-40 to 85 C)
CS Vcc-0.2V
Vcc=3.0V
CS Vcc-0.2V
See data retention waveform
Symbol
Test Condition
5
t
t
t
t
t
t
t
t
t
t
t
t
WHZ
t
t
t
t
OHZ
t
t
t
OLZ
WC
CW
AW
WP
WR
DW
OW
RC
CO
OE
OH
DH
A
AA
HZ
AS
LZ
=0 to 70 C, KM62256CE Family : T
L-Ver
LL-Ver
L-Ver
LL-Ver
L-Ver
LL-Ver
Min
1. Including scope and jig capacitance
55
10
55
45
45
40
25
5
0
0
5
0
0
0
0
5
-
-
-
C
L
55ns
1)
Max
55
55
25
20
20
20
Speed Bins
-
-
-
-
-
-
-
-
-
-
-
-
-
Min
2.0
0
5
-
-
-
-
-
-
Min
70
10
70
60
60
50
30
5
0
0
5
0
0
0
0
5
-
-
-
Typ
CMOS SRAM
0.5
A
1
-
-
-
-
-
-
-
70ns
=-25 to 85 C,
Max
70
70
35
30
30
25
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
December 1997
5.5
50
10
50
25
50
25
-
-
Revision 4.0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ms
V
A