km62256c Samsung Semiconductor, Inc., km62256c Datasheet - Page 7

• Manufacturer Part Number: km62256c
• Description: 32kx8 Bit Low Power Cmos Static Ram
• Manufacturer: Samsung Semiconductor, Inc.

KM62256C Family
DATA RETENTION WAVE FORM
TIMING WAVEFORM OF WRITE CYCLE(1)
TIMING WAVEFORM OF WRITE CYCLE(2)
CS controlled
Address
CS
WE
Data in
Data out
Address
CS
WE
Data in
Data out
NOTES (WRITE CYCLE)
1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE
2. t
3. t
4. t
going low : A write end at the earliest transition among CS going high and WE going high, t
to the end of write.
CW
AS
WR
V
4.5V
2.2V
V
CS
GND
CC
DR
is measured from the address valid to the beginning of write.
is measured from the CS going low to end of write.
is measured from the end of write to the address change. t
Data Undefined
High-Z
t
SDR
t
t
AS(3)
AS(3)
(WE Controlled)
(CS Controlled)
W R
t
WHZ
t
AW
Data Retention Mode
applied in case a write ends as CS or WE going high.
t
AW
t
t
WC
CW(2)
t
7
t
CW(2)
CS V
WC
t
t
WP(1)
WP(1)
CC
- 0.2V
t
t
DW
DW
Data Valid
Data Valid
WP
t
t
is measured from the begining of write
WR(4)
WR(4)
t
t
DH
DH
t
OW
High-Z
t
RDR
CMOS SRAM
December 1997
Revision 4.0