lc75804e Sanyo Semiconductor Corporation, lc75804e Datasheet
lc75804e
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lc75804e Summary of contents
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... Ordering number : ENN6266A Overview The LC75804E and LC75804W are 1/3 duty and 1/4 duty LCD display drivers that can directly drive up to 300 segments and can control up to eight general-purpose output ports. These products also incorporate a key scan circuit that accepts input from keys to reduce printed circuit board wiring ...
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... CE hold time High level clock pulse width Low level clock pulse width Rise time Fall time DO output delay time DO rise time Note: *1. Since open-drain output, these values depend on the resistance of the pull-up resistor R LC75804E, LC75804W =0V SS Symbol Conditions V max V DD ...
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... Output off leakage current Output high level voltage Output low level voltage 2 Output middle level voltage * Oscillator frequency Current drain Nete: *2. Excluding the bias voltage generation divider resistor built into V LC75804E, LC75804W Symbol Conditions V CE, CL, DI, RES, KI1 to KI5 H V DET ...
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... VIH1 CL 50% VIL tr VIH1 DI VIL tds tdh DO 2. When CL is stopped at the high level CE t ø ø tds DO LC75804E, LC75804W V LCD 1 To the common segment driver 2 Excluding these registors. Figure 1 VIH1 t ø tcp tcs D0 VIH1 VIH1 50% VIL ...
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... KS3 KS4 KS5 KS6 KI1 KI2 KI3 KI4 KI5 VDD VLCD VLCD1 VLCD2 VSS TEST OSC RES 100 1 LC75804E, LC75804W LC75804E (QFP100E) 51 LC75804W (SQFP100 S48 S47 S46 S45 S44 S43 S42 S41 S40 S39 S38 S37 S36 S35 ...
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... Block Diagram VLCD VLCD1 COMMON DRIVER VLCD2 VSS TEST CLOCK OSC GENERATOR DO DI INTERFACE CL CE VDD VDET LC75804E, LC75804W SEGMENT DRIVER & LATCH CONTROL REGISTER CCB SHIFT REGISTER KEY BUFFER KEY SCAN No. 6266-6/37 ...
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... LCD driver block power supply connection. Provide a voltage LCD between Power supply connection. Connect to ground. SS LC75804E, LC75804W Function /384)Hz. OSC Key scan disabled All key data is reset to low Key scan enabled 2 when a 1/2 bias drive scheme is used. LCD 1 when a 1/2 bias drive scheme is used. LCD – ...
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... D154 D155 Note B3 ...... CCB address DD ................................ Direction data LC75804E, LC75804W D73 D74 D75 D76 D77 D78 Display data D151 D152 D153 Display data D226 D227 D228 ...
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... S0, S1 ...................... Sleep control data K0, K1 ...................... Key scan output/segment output selection data .................. Segment output port/general-purpose output port selection data SC ............................ Segment on/off control data DR ............................ 1/2 bias or 1/3 bias drive selection data DT ............................ 1/3 duty or 1/4 duty drive selection data LC75804E, LC75804W D73 D74 D75 D76 D77 D78 ...
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... D229 Display data Note B3 ...... CCB address DD ................................ Direction data LC75804E, LC75804W D72 D73 D74 D75 D76 Display data D148 D149 D150 D151 D152 Display data ...
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... D1 to D300 .............. Display data S0, S1 ...................... Sleep control data K0, K1 ...................... Key scan output/segment output selection data .................. Segment output port/general-purpose output port selection data SC ............................ Segment on/off control data DR ............................ 1/2 bias or 1/3 bias drive selection data DT ............................ 1/3 duty or 1/4 duty drive selection data LC75804E, LC75804W ...
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... D16 S7/P7 D19 S8/P8 D22 For example, if the circuit is operated in 1/4 duty and the S4/P4 output pin is selected general-purpose output port, the S4/P4 output pin will output a high level (V (Vss) when D13 is 0. LC75804E, LC75804W Segment outputs OSC oscillator Common outputs Operating Operating Stopped L Stopped ...
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... S25 D73 D74 D75 S26 D76 D77 D78 Note: This is for the case where the output pins S1/P1 to S8/P8, COM4/S74, KS1/S75 and KS2/S76 are selected for use as segment outputs. LC75804E, LC75804W Output pin state (COM4/S74) COM4 S74 Output pin COM1 COM2 COM3 S27 ...
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... S36 D141 D142 S37 D145 D146 S38 D149 D150 Note: This is for the case where the output pins S1/P1 to S8/P8, KS1/S75 and KS2/S76 are selected for use as segment outputs. LC75804E, LC75804W Output pin state (S11) COM3 COM4 Output pin D3 D4 S39 D7 D8 S40 ...
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... Note B3 A3······CCB address CCB address ...... 43H KD1 to KD30 ........ Key data SA ........................ Sleep acknowledge data Note key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data(SA) will be invalid. LC75804E, LC75804W Output pin state (S11 ...
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... This mode is cleared by sending control data with both S0 and S1 set to 0. However, note that the S1/P1 to S8/P8 outputs can be used as general-purpose output ports according to the state of the control data bits, even in sleep mode. (See the control data description for details.) LC75804E, LC75804W KI3 KI4 ...
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... CE is high during a serial data transfer, DO will be set high. • After the controller reads the key data, the key data read request is cleared (DO is set high) and the LC75804E/W performs another key scan. Also note that DO, being an open-drain output, requires a pull-up resistor (between 1 and 10 kΩ ...
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... CE is high during a serial data transfer, DO will be set high. • After the controller reads the key data, the key data read request is cleared (DO is set high) and the LC75804E/W performs another key scan. However, this dose not clear sleep mode. Also note that DO, being an open-drain output, requires a pull-up resistor (between 1 and 10 kΩ ...
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... LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when all LCD segments corresponding to COM1, COM2 and COM3 are on. LC75804E, LC75804W fosc [Hz] 384 1/3 Duty, 1/2 Bias Waveforms VLCD ...
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... LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when all LCD segments corresponding to COM1, COM2 and COM3 are on. LC75804E, LC75804W fosc [Hz] 384 1/3 Duty, 1/3 Bias Waveforms VLCD ...
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... LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3 and COM4 are on. LC75804E, LC75804W fosc [Hz] 384 1/4 Duty, 1/2 Bias Waveforms VLCD ...
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... LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3 and COM4 are on. LC75804E, LC75804W fosc [Hz] 384 1/4 Duty, 1/3 Bias Waveforms VLCD ...
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... System Reset The LC75804E/W supports the reset methods described below. When a system reset is applied, display is turned off, key scanning is stopped, and all the key data is reset to low. When the reset is cleared, display is turned on and key scanning become possible. ...
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... VDD VLCD D76 S0, S1, K0, K1 Internal data P0 to P3, SC, DR, DT Internal data (D77 to D152) Internal data (D153 to D228) Internal data (D229 to D300) LC75804E, LC75804W t1 t2 VDET VIL Display and control data transfer Undefined Undefined Undefined System reset period Note: t1 ≥ 1 [ms] (Logic block power supply voltage V t2 ≥ ...
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... Reset when the logic block power supply voltage is in the allowable operating range (V The system is reset when the RES pin is set low, and the reset is cleared by setting RES pin high. 2. LC75804E/W internal block states during the reset period • CLOCK GENERATOR Reset is applied and the base clock is stopped ...
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... When power is first applied, these output pins are undefined until the S0 and S1 control data bits have been transferred. *8. Since this output pin is an open-drain output, a pull-up resistor of between 1 and 10 kΩ is required. This pin remains high during the reset period even if a key data read operation is performed. LC75804E, LC75804W SEGMENT DRIVER & LATCH CONTROL ...
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... Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET. DD *10. If the RES pin is not used for system reset, it must be connected to the logic block power supply V *11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ ...
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... Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET. DD *10. If the RES pin is not used for system reset, it must be connected to the logic block power supply V *11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ ...
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... Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET. DD *10. If the RES pin is not used for system reset, it must be connected to the logic block power supply V *11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ ...
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... Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET. DD *10. If the RES pin is not used for system reset, it must be connected to the logic block power supply V *11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ ...
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... Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET. DD *10. If the RES pin is not used for system reset, it must be connected to the logic block power supply V *11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ ...
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... Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET. DD *10. If the RES pin is not used for system reset, it must be connected to the logic block power supply V *11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ ...
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... Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET. DD *10. If the RES pin is not used for system reset, it must be connected to the logic block power supply V *11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ ...
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... Notes on transferring display data from the controller When using the LC75804E/W in 1/3 duty, applications transfer the display data (D1 to D228) in three operations, and in 1/4 duty, they transfer the display data (D1 to D300) in four operations. In either case, applications should transfer all of the display data within maintain the quality of the displayed image ...
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... The period t9 in this technique must satisfy the following condition. t9>t6+t7+ key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data (SA) will be invalid. LC75804E, LC75804W ...
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... Key scan execution time when the key data agreed for two key scans. (615T(s)) t6: Key scan execution time when the key data did not agree for two key scans and the key scan was executed again. (1230T(s)) t7: Key address (43H) transfer time t8: Key data read time LC75804E, LC75804W NO Key on t5 ...
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... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 2003. Specifications and information herein are subject to change without notice. LC75804E, LC75804W PS No. 6266-37/37 ...