lc75893m Sanyo Semiconductor Corporation, lc75893m Datasheet
lc75893m
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lc75893m Summary of contents
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... Ordering number : ENN5971A 1/3 Duty LCD Display Driver with Key Input Function Overview The LC75893M is a 1/3 duty LCD display driver that can directly drive segments and can control up to four general-purpose output ports. This product also incorporates a key scan circuit that accepts input from keys to reduce printed circuit board wiring ...
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... L ø Rise time t r Fall time output delay time rise time t dr Note *1: Since open-drain output, these values depend on the resistance of the pull-up resistor R LC75893M = 0V SS Symbol Conditions V max CE, CL OSC, KI1 to KI5, TEST, V ...
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... V 5 MID Oscillator frequency f OSC Current drain Note *2: Excluding the bias voltage generation divider resistor built into V LC75893M Conditions CE, CL, DI, KI1 to KI5 CE, CL CE, CL, DI KI1 to KI5 KI1 to KI5 KS1 to KS4 – ...
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... When CL is stopped at the low level • When CL is stopped at the high level LC75893M To the common segment driver Excluding these resistors. Figure 1 Figure 2 No. 5971-4/23 ...
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... Pin Assignment Block Diagram LC75893M No. 5971-5/23 ...
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... Used for applying the LCD drive 1/3 bias voltage externally. Must connected Power supply connection. Provide a voltage of between 4.5 and 6 Power supply connection. Connect to ground. SS LC75893M Function is given by /384) Hz OSC 2 when a 1/2 bias drive scheme is used when a 1/2 bias drive scheme is used. DD Handling Active ...
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... SC·····················Segment on/off control data • DR·····················1/2 bias or 1/3 bias drive selection data LC75893M Display data ...
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... This control data bit controls the on/off state of the segments. SC Display state Off However, note that when the segments are turned off by setting the segments are turned off by outputting segment off waveforms from the segment output pins. LC75893M Segment outputs OSC oscillator Common outputs Operating Operating Stopped L Stopped ...
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... The LCD segments for COM1 and COM3 are The LCD segments for COM1 and COM2 are The LCD segments for COM1, COM2, and COM3 are on LC75893M COM3 D12 D15 D18 D21 D24 D27 D30 D33 ...
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... This mode is cleared by sending control data with both S0 and S1 set to 0. However, note that the S1/P1 to S4/P4 outputs can be used as general-purpose output ports according to the state of the control data bits, even in sleep mode. (See the control data description for details.) LC75893M Output data Output data ...
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... Key Scan Operation Functions 1. Key scan timing The key scan period is 192 T (s). To reliably determine the on/off state of the keys, the LC75893M scans the keys twice and determines that a key has been pressed when the key data agrees. It outputs a key data read request (a low level on DO) 420 T (s) after starting a key scan ...
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... However high during a serial data transfer, DO will be set high. • After the controller reads the key data, the key data read request is cleared (DO is set high) and the LC75893M performs another key scan. However, this does not clear sleep mode. Also note that DO, being an open-drain output, requires a pull-up resistor (between 1 and 10 kΩ ...
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... COM3 are on. LCD drive output when LCD segments corresponding to COM1 and COM3 are on. LCD drive output when LCD segments corresponding to COM2 and COM3 are on. LCD drive output when all LCD segments corresponding to COM1, COM2, and COM3 are on. LC75893M 1/3 Duty, 1/2 Bias Waveforms No. 5971-13/23 ...
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... COM3 are on. LCD drive output when LCD segments corresponding to COM1 and COM3 are on. LCD drive output when LCD segments corresponding to COM2 and COM3 are on. LCD drive output when all LCD segments corresponding to COM1, COM2, and COM3 are on. LC75893M 1/3 Duty, 1/3 Bias Waveforms No. 5971-14/23 ...
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... Figure 3.) System Reset The LC75893M supports the reset method described below. When a system reset is applied, display is turned off, key scanning is stopped, and all the key data is reset to low. When the reset is cleared, display is turned on and key scanning become possible ...
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... When power is first applied, these output pins are undefined until the S0 and S1 control data bits have been transferred. *7. Since this output pin is an-open drain output, a pull-up resistor of between 1 and 10 kΩ is required. This pin remains high during the reset period even if a key data read operation is performed. LC75893M Blocks that are reset No. 5971-16/23 ...
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... Note: *8.Add a capacitor to the power supply line so that the power supply voltage V time when power drops are both at least 1 ms, as the LC75893M is reset by the VDET. *9.The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded ...
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... Note: *8.Add a capacitor to the power supply line so that the power supply voltage V time when power drops are both at least 1 ms, as the LC75893M is reset by the VDET. *9.The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded ...
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... Note: *8.Add a capacitor to the power supply line so that the power supply voltage V time when power drops are both at least 1 ms, as the LC75893M is reset by the VDET. *9.The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded ...
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... DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between kΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded. Notes on transferring display data from the controller The display data (D1 to D48) is transferred to the LC75893M in two operations. All of the display data should be transferred within maintain the quality of the displayed image. LC75893M ...
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... The period t7 in this technique must satisfy the following condition. t7 > key data read operation is executed when DO is high, the read key data (KD1 to KD20) and sleep acknowledge data (SA) will be invalid. LC75893M —— fosc No. 5971-21/23 ...
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... DO state when CE is low and reading the key data. The period t8 in this technique must satisfy the following condition. t8 > key data read operation is executed when DO is high, the read key data (KD1 to KD20) and sleep acknowledge data (SA) will be invalid. LC75893M 1 fosc No. 5971-22/23 ...
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... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of November, 1999. Specifications and information herein are subject to change without notice. LC75893M PS No. 5971-23/23 ...