w89c840af Winbond Electronics Corp America, w89c840af Datasheet - Page 59

• Manufacturer Part Number: w89c840af
• Description: 100/10mbps Ethernet Controller
• Manufacturer: Winbond Electronics Corp America

MDC
MDIO
MDC
MDIO
Bit
31:20
19
18
17
16
15
Idle
Idle
z
z
Attribute
R
R
R/W
R/W
R/W
R
Preamble
Preamble
....
....
Start Read
Start Write PHYAD
0 1
0 1
Bit name
---
MDI
MDSEL
MDO
MDC
---
1 0
0 1
PHYAD
Typical MDIO/MDC Read Cycle
Typical MDIO/MDC Write Cycle
Description
Reserved. Fixed at 0.
MII Management Port Data Input
The MII management input data drove, by the external PHY , on
the MIMDIO pin can be read from this bit when the MDSEL is
reset. The MDI reflects the logic level on the MIMDIO pin
instantly, no latching device is used for keeping the logic level
message.
MII Management Port Read/Write Select
The MIMDIO pin will be programmed as an input pin when the
MDSEL is reset. On the other hand, the MIMDIO will be an output
pin if MDSEL is set to high.
MII Management Port Write Data
The state of the MDO will be directly output through the MIMDIO
pin when the MIMDIO is performing an output pin. The serial
command of the external physical device should be written into
MDO serially with one bit data one MII management clock. The
accessed data sequence and timing are shown as the diagram
above .
MII Management Port Clock.
The state of the MDC will be directly driven on the MIMDC pin for
providing the MII management clock. To generate this clock
source, the MDC should be programmed as 1 and 0 with equal duty
cycle and timing width alternately. The AC timing specification
with respect to the MIMDC and MIMDIO should follow the media
independent interface(MII) specification defined in IEEE 802.3u.
Reserved. Fixed at 0.
-59 -
REGAD
REGAD
Z 0
1 0
TA
TA
Publication Release Date:October 2000
Revision 1.01
high impedance(z)
Data
Data
W89C840AF
....
....
Idle
Idle