gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 5

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

2. Features
CPU
On-chip Memories
ISP (In System Programming) of FLASH
IAP (In Application Programming) of FLASH
I/O Ports
4-bit reduced 8051 architecture
Continuous program addressing, not paged.
51 instructions including push, pop and logic inst.
Instruction cycle : F
Multi-level subroutine nesting with RAM based
stack.
FLASH : 1024 bytes (including 128 EEPROM)
RAM : 64 nibbles (including stack)
P0 : 4-bit parallel I/O (Open drain output)
P1 : Parallel I/O (Open drain output),
P2, P3 : 4-bit parallel/bit-selectable I/O (Open
drain output)
P4 : Parallel I/O (Open drain output).
4-bit for 24-pin, 2-bit for 20-pin.
Two bits if internal clock is used.
Additional two bits for 24-pin packages.
SYS
/6
REM output (Remote control transmitter)
Carrier Pulse Generation : 7 types
Built-in Oscillator
Built-in Reset
Power Management
Built-in Transistor for I.R. LED Drive
I
Crystal/Ceramic resonator
Precision internal oscillator
The Factory Calibration for 7.28MHz is applied
only for GC49C501RX devices.
Power-on Reset, Power-fail Reset
WDT (Watch-Dog Timer) Reset
Clock switching reset
Power-down (stop) mode
Release stop by input changes
Sleep mode
OL
= 300 mA (Max.) at V
Factory Calibrated to ± 3% at 2.1 ~ 3.3V
Factory Calibrated to ± 1% at 2.5V
ATOM1.0 Family
DD
= 3V and V
Preliminary
O
= 0.4V
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