in74hc192 Integral Corp., in74hc192 Datasheet

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in74hc192

Manufacturer Part Number
in74hc192
Description
Presettable Bcd/decade Up/down Counter
Manufacturer
Integral Corp.
Datasheet
Presettable BCD/Decade UP/DOWN Counter
High-Performance Silicon-Gate CMOS
device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
Count Down Clock inputs. The direction of counting is determined
by which input is clocked. The outputs change state synchronous
with the LOW-to-HIGH transitions on the clock inputs. This counter
may be preset by entering the desired data on the P0, P1, P2, P3
input. When the Parallel Load input is taken low the data is loaded
independently of either clock input. This feature allows the counters
to be used as devide-by-n by modifying the count lenght with the
preset inputs. In addition the counter can also be cleared. This is
accomplished by inputting a high on the Master Reset input. All 4
internal stages are set to low independently of either clock input.Both
a Terminal Count Down (TC
Outputs are provided to enable cascading of both up and down
counting functions. The TC
when the counter underflows and TC
counter overflows. The counter can be cascaded by connecting the
TC
Count Down Clock inputs, respectively, of the next device.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 μA
• High Noise Immunity Characteristic of CMOS Devices
U
The IN74HC192 is identical in pinout to the LS/ALS192. The
The counter has two separate clock inputs, a Count Up Clock and
and TC
D
outputs of one device to the Count Up Clock and
D
output produces a negative going pulse
D
) and Terminal Count Up (TC
LOGIC DIAGRAM
PIN 8 = GND
U
PIN 16 =V
outputs a pulse when the
CC
U
)
ORDERING INFORMATION
T
A
TECHNICAL DATA
PIN ASSIGNMENT
IN74HC192N Plastic
= -55° to 125° C for all
IN74HC192D SOIC
IN74HC192
packages
1

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in74hc192 Summary of contents

Page 1

... Presettable BCD/Decade UP/DOWN Counter High-Performance Silicon-Gate CMOS The IN74HC192 is identical in pinout to the LS/ALS192. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The counter has two separate clock inputs, a Count Up Clock and Count Down Clock inputs ...

Page 2

... Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V Unused outputs must be left open. Parameter and GND Pins CC SOIC Package+ Parameter IN74HC192 Value Unit -0.5 to +7 ±20 mA ±25 mA ±50 ...

Page 3

... CC I =0μA OUT FUNCTION TABLE The IN74HC192 can be preset to any state, but Mode will not count beyond 9. If preset to state 10, 11, 12, 13 15, it will follow the sequence 10, 11, 6: 12, 13, 4: 14, 15 counting Up, and follow the sequence 15, 14, 13, 12, 11, 10 counting Down ...

Page 4

... IN74HC192 =t =6.0 ns Guaranteed Limit 25 °C to ≤85°C ≤125°C Unit -55°C 12 3.2 2.6 MHz 215 270 325 215 270 325 ...

Page 5

... Figure 1. Switching Waveforms Figure 3. Switching Waveforms Figure 5. Switching Waveforms IN74HC192 Figure 2. Switching Waveforms Figure 4. Switching Waveforms Figure 6. Test Circuit 5 ...

Page 6

... TIMING DIAGRAM IN74HC192 6 ...

Page 7

... EXPANDED LOGIC DIAGRAM IN74HC192 7 ...

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