ade3800 STMicroelectronics, ade3800 Datasheet - Page 21

• Manufacturer Part Number: ade3800
• Description: Analog Lcd Display Engine For Xga And Sxga Resolutions With Embedded Lvds And Rsds Transmitters
• Manufacturer: STMicroelectronics

ADE3800
4.3 Analog-to-Digital Converter (ADC)
FSYN_FM_AMPLITUDE
FSYN_FM_PERIODX64
FSYN_PULSE_HIGH_EXT
FSYN_PR_SK_0
FSYN_PR_SK_1
FSYN_OUTCLK_FREQ
DOTCLK SOURCE SEL
GLBL_CLK_SRC_SEL_0[6:4]
GLBL_CLK_SRC_SEL_1[6:4]
FSYN_PR_OTCLK
Register Name
Register Name
The Analog-to-Digital block has the following features:
GAIN CONTROL
Red, Green, and Blue channels have independent control registers: ANA_ADC_RED_0,
ANA_ADC_GRN_0, and ANA_ADC_BLU_0, respectively.
●
●
●
●
●
●
●
Supports input clocks up to 140MHz (SXGA 75Hz)
Adjustable analog amplifier bandwidth
Differential RGB input path for noise immunity
Built-in Sync-on-Green support
Individual RGB clock delay control
Power down control
Linear and independent Gain/Offset adjustment.
Table 10: FSYN Frequency Synthesizer Registers (Sheet 2 of 2)
0855
0856
0857
0860
0861
Addr
Addr
2x DOTCLK_FREQ
FSYN_OUTCLK_DIV2 (half speed)
2
3
2^21 * XCLK_FREQ / 2x DOTCLK_FREQ
R/W
R/W
R/W
R/W
R/W
R/W
Mode
Mode
Table 11: FSYN_PR_SK Registers
Table 12: Clock Relationship
[7:0]
[7:0]
[7]
[2:0]
[7:0]
[7:0]
Bits
Bits
1 ppc
00
80
00
00
00
Rst
Rst
frequency modulation amplitude
LSB = 4.5ps
frequency modulation period
LSB = 1.184us
enable pulse extend
0*: disabled
1: enabled
pulse extend value
LSB = 0.3ns (typ)
sclk phase rate
= 2^15 * xclk_freq / sclk_freq
Set sclk = 140MHz
i.e. FSYN_PR_SK_1/0 = 18AFh @ xclk = 27MHz
DOTCLK_FREQ
FSYN_OUTCLK (full speed)
3
3
2^21 * XCLK_FREQ / DOTCLK_FREQ
Register Description by Block
Description
Description
2 ppc
21/138