ade3800 STMicroelectronics, ade3800 Datasheet - Page 7

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ade3800

Manufacturer Part Number
ade3800
Description
Analog Lcd Display Engine For Xga And Sxga Resolutions With Embedded Lvds And Rsds Transmitters
Manufacturer
STMicroelectronics
Datasheet

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ADE3800
2
Power-up / Initialize When power is first applied, the ADE3800 is asynchronously reset from a pin.
Activity Detect
Analog
R, G, B
Data
Analog
H&V
Syncs
Feature
General Description
The ADE3800 family of devices is capable of implementing all of the advanced features of todays
LCD monitor products. For maximum flexibility, an external microcontroller (MCU) is used for
controlling the ADE3800 and other monitor functions.
The ADE3800 architecture unburdens the MCU from all data-intensive pixel manipulations,
providing an optimal blend of features and code customizing without incurring the cost of a 16-bit
processor or memory. The key interactions between the monitor MCU and the ADE3800 can be
broken down into the features shown in
Control
Global
MCU (SCL, SDA)
GLBL
I²C
Domain
Line Lock
INCLK
(Analog)
(Digital)
The MCU typically programs the ADE3800 with a number of default values and
sets up the ADE3800 to identify activity on any of the input pins. All pre-
configured values and RAMs, such as line-lock PLL settings, OSD characters,
LCD timing values (output sequencer), scale kernels, gamma curves, sRGB
color warp, APC dithering, output pin configuration (OMUX), etc. can be pre-
loaded into the ADE3800. The typical end state is that the ADE3800 is
initialized into a low power mode, ready to turn active once the power button is
pressed.
When the monitor has been powered on, the inputs can be monitored for active
video sources. Based on the activity monitors, the MCU chooses an input or
power down state.
ADC
ADC
PLL
LLK
Pulse Width
Modulation
Domain
XCLK
PWM
Multiplexer
Measure
Retiming
Table 1: ADE3800 Features (Sheet 1 of 2)
Description of ADE3800 Operation
SMEAS
Measure
DMEAS
SMUX
Sync
Sync
Sync
SRT
Data
Figure 1: ADE3800 Block Diagram
Domain
SCLK
Scaler
SCLK
PLL
Table
SCL
1.
Domain
PLL, FM
DCLK
DCLK
Controller
Timing
TCON
Detection
Flicker
FLK
ADE3800
General Description
GLBL
SMEAS
LLK
ADC
OSD
SCALER
GAMMA
SRGB
TCON
APC
OMUX
SMEAS
Blocks Used
Out Data
Syncs, &
Clock
TCON
18
36
30
21
72
53
71
68
102
92
94
36
Pages
7/138

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