lc86p5632 Sanyo Semiconductor Corporation, lc86p5632 Datasheet
lc86p5632
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lc86p5632 Summary of contents
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... The option function of the LC865600 series can be specified by the PROM data. LC86P5632 can be checked the function of the trial pieces using the mass production board. (2) Internal one-time PROM capacity (3) Internal RAM capacity Used PROM or RAM capacity are equal ROM or RAM capacity of mask ROM version which applies LC86P5632. Mask ROM version LC865632 LC865628 ...
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... The pin and the package compatible with the LC865600 series mask ROM devices (8) Applicable mask ROM version (9) Factory shipment Notice for use LC86P5632 is provided for the first release and small shipping of the LC865600 series. At using, take notice of the followings. (1) A point of difference LC86P5632 and LC865600 series Item Port form at reset Please refer “ ...
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... Pull-up MOS Tr. not provided Pull-up MOS Tr. provided (2) Option LC86P5632 uses 256 bytes which is addressed on 7F00H to 7FFFH in the program memory as option data area. This area does not affect the execution of program but the program memory capacity of LC865632 is 32512 bytes which is addressed on 0000H to 7EFFH. ...
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... Debugged evaluation file (EVA file) must be converted to an INTEL-HEX formatted file (HEX file) with file converter program, EVA2HEX.EXE. The HEX file is used as the programming data for the LC86P5632. (2) How to program for the PROM LC86P5632 can be programmed by the EPROM programmer with attachment ; W86EP5032D, W86EP5032Q. • Recommended EPROM programmer Productor ...
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... The programming by a sequential operation “BLANK PROGRAM VERIFY” cannot be executed data security at the sequence 2 above. • Set to ‘OFF’ the jumper after executing the data security. Data security Not data security 1 pin W86EP5032D LC86P5632 1 pin mark Data security of LSI Not data security 1 pin W86EP5032Q ...
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... RES XT1/ P74 XT2 VSS CF1 CF2 VDD P80/AN0 P81/AN1 P82/AN2 P83/AN3 P84/AN4 P85/AN5 P86/AN6 P87/AN7 P70/INT0 P71/INT1 P72/INT2/T0IN P73/INT3/T0IN P30 P31 P32 P33 Package Dimension (unit : mm) 3071 LC86P5632 ...
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... The QFP packages should be heat-soaked for 12 hours at 125 C immediately prior to mounting (This baking is called pre-baking). • After pre-baking, a controlled environment must be maintained until soldering. The environment must be held at a temperature less and a humidity level of 70% or less. Please solder within 24 hours. LC86P5632 ...
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... Interrupt Control Standby Control CF RC X’tal Base Timer SIO0 SIO1 Timer 0 Timer 1 ADC INT0 to 3 Noise Filter Real Time Service XRAM (128 bytes) LC86P5632 IR EPROM Control EPROM (32KB) Bus Interface Port 1 Port 7 Port 8 Port 2 Port 3 Port 4 Port 5 Watch Dog Timer PLA A15-A0 D7-D0 ...
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... LC86P5632 Pin description Pin name I/O Function description VSS - Power pin (-) VDD - Power pin (+) VDDVPP - Power pin (+) PORT0 I/O •8-bit input/output port P00 to P07 •Input for port 0 interrupt •Input/output in nibble units •Input for HOLD release PORT1 I/O •8-bit input/output port P10 to P17 • ...
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... Chip enable input TA PROM control signal input *4 *5 A14 Address input * Connect like the following figure to reduce noise into a VDD terminal. Short-circuit the VDD terminal to the VDDVPP terminal. Short-circuit the VSS terminal to the VSS terminal. Power Supply LC86P5632 Option - - - - - - - LSI VDD ...
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... The QFP packages should be heat-soaked for 12 hours at 125 C immediately prior to mounting (This baking is called pre-baking). • After pre-baking, a controlled environment must be maintained until soldering. The environment must be held at a temperature less and a humidity level of 70% or less. Please solder within 24 hours. LC86P5632 Pins Conditions VDD=VDDVPP 74 • ...
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... Operation tCYC cycle time Oscillation FmCF(1) CF1, CF2 frequency range (Note 1) FmCF(2) CF1, CF2 FmRC FsXtal XT1, XT2 LC86P5632 Pins Conditions 0.98 s tCYC tCYC 400 s RAMs and the registers hold voltage at HOLD mode. (Schmitt) Output disable Output disable Output N-channel Tr. OFF (Schmitt) Output N-channel Tr ...
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... Symbol Pins Oscillation tmsCF(1) CF1, CF2 stabilizing time period (Note 1) tmsCF(2) CF1, CF2 tssXtal XT1, XT2 (Note 1) The oscillation constant is shown on table 1 and table 2. LC86P5632 Conditions VDD[V] •6MHz 4.5 to 6.0 (ceramic resonator oscillation) •Refer to figure 3 •1.5MHz 4.5 to 6.0 (ceramic resonator oscillation) •Refer to figure 3 •32.768kHz 4 ...
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... Pull-up MOS Rpu •Ports 0,1,2,3,4,5 Tr. resistor •Ports 70,71,72,73 Hysteresis VHIS •Ports 0,1,2,3,4,5 voltage •Ports 70,71,72,73 • RES Pin CP All pins capacitance LC86P5632 Conditions VDD[V] •Output disable 4.5 to 6.0 •VIN=13.5V (including off-leakage current of the output Tr.) •Output disable 4.5 to 6.0 •Pull-up MOS Tr. OFF. •VIN=VDD (including off-leakage current of the output Tr.) VIN=VDD 4.5 to 6.0 VIN=VDD 4.5 to 6.0 • ...
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... Data hold time tCKI Output delay time tCKO(1) (External clock using for serial transfer clock) Output delay time tCKO(2) (Internal clock using for serial transfer clock) LC86P5632 Pins Conditions VDD[V] SCK0,SCK1 Refer to figure 5 4.5 to 6.0 SCK0,SCK1 •Use pull-up 4.5 to 6.0 resistor ( the open drain output. • ...
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... IAINH input current IAINL (Note 2) Absolute precision excepts the quantizing error (±1/2 LSB). (Note 3) The conversion time means the time from executing the AD conversion instruction to setting the complete digital conversion value to the register. LC86P5632 Pins Conditions •Interrupt acceptable •Timer0-countable •Interrupt acceptable • ...
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... Current Dissipation Characteristics at Ta=- +70 C, VSS=0V Parameter Symbol Current dissipation IDDOP(1) during basic operation (Note 4) IDDOP(2) IDDOP(3) IDDOP(4) LC86P5632 Pins Conditions VDD[V] VDD •FmCF=6MHz 4.5 to 6.0 Ceramic resonator oscillation •FsXtal=32.768kHz crystal oscillation •System clock : CF oscillation •Internal RC oscillation stops •FmCF=1.5MHz 4.5 to 6.0 Ceramic resonator oscillation • ...
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... HALT mode (Note 4) IDDHALT(2) IDDHALT(3) IDDHALT(4) Current dissipation IDDHOLD(1) in HOLD mode IDDHOLD(2) (Note 4) (Note 4) The currents of the output transistors and the pull-up MOS transistors are ignored. LC86P5632 Pins Conditions VDD[V] •HALT mode 4.5 to 6.0 •FmCF=6MHz Ceramic resonator oscillation •FsXtal=32.768kHz crystal oscillation •System clock : CF oscillation • ...
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... CF1 Figure 1 Main-clock circuit Ceramic oscillation circuit LC86P5632 Oscillator C1 CSA12.0MTZ 33pF CSA12.0MTZ 39pF CST12.0MTW on chip CSA3.00MG040 100pF CST3 ...
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... HOLD release signal Internal RC resontor oscillation CF1, CF2 XT1, XT2 Operation mode HOLD <HOLD release signal and oscillation stable time> Figure 3 LC86P5632 Reset time tmsCF tssXtal Reset Instruction execution mode Valid tmsCF tssXtal Instruction execution mode Oscillation stable time ...
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... SI1 tCKO SO0, SO1 SB0, SB1 Figure 5 Serial input / output test condition tPIL Figure 6 LC86P5632 (Note) Fix the value of CRES, RRES that is sure to reset until 200 s, after Power supply has been over inferior limit of supply voltage. Reset circuit 0.5VDD tCKCY tCKH ...
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... Heat-soak +1 150±5° Reading ascertation of program Mounting b. Shipping with a programmed PROM (Programming the data by Sanyo) DIP Mounting LC86P5632 To probe reliability of the programmed devices, the screening QFP Programming and verifying Recommended process of screening Heat-soak +1 150±5° Reading ascertation of program ...
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... LC86P5632 No.6688-23/23 PS ...