hm5212165f-75 Renesas Electronics Corporation., hm5212165f-75 Datasheet

Manufacturer Part Number

hm5212165f-75

Description

128m Lvttl Interface Sdram 133 Mhz/100 Mhz 2-mword X 16-bit X 4-bank/4-mword X 8-bit X 4-bank Pc/133, Pc/100 Sdram - Hitachi Semiconductor

Manufacturer

Renesas Electronics Corporation.

Datasheet

1.HM5212165F-75.pdf (63 pages)

Description

The Hitachi HM5212165F is a 128-Mbit SDRAM organized as 2097152-word

Hitachi HM5212805F is a 128-Mbit SDRAM organized as 4194304-word

outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.

Features

3.3 V power supply

Clock frequency: 133 MHz/100 MHz (max)

LVTTL interface

Single pulsed RAS

4 banks can operate simultaneously and independently

Burst read/write operation and burst read/single write operation capability

Programmable burst length: 1/2/4/8/full page

2 variations of burst sequence

Programmable CAS latency: 2/3

Byte control by DQM : DQM (HM5212805F)

Refresh cycles: 4096 refresh cycles/64 ms

Sequential (BL = 1/2/4/8/full page)

Interleave (BL = 1/2/4/8)

2-Mword 16-bit 4-bank/4-Mword 8-bit 4-bank

HM5212165F-75/A60/B60

HM5212805F-75/A60/B60

: DQMU/DQML (HM5212165F)

128M LVTTL interface SDRAM

PC/133, PC/100 SDRAM

133 MHz/100 MHz

8-bit

ADE-203-1048A (Z)

4-bank. All inputs and

16-bit

Jan. 31, 2000

4-bank. The

Rev. 1.0