hm5212165f-75 Renesas Electronics Corporation., hm5212165f-75 Datasheet - Page 33

• Manufacturer Part Number: hm5212165f-75
• Description: 128m Lvttl Interface Sdram 133 Mhz/100 Mhz 2-mword X 16-bit X 4-bank/4-mword X 8-bit X 4-bank Pc/133, Pc/100 Sdram - Hitachi Semiconductor
• Manufacturer: Renesas Electronics Corporation.

Read command to Precharge command interval (same bank):
When the precharge command is executed for the same bank as the read command that preceded it, the
minimum interval between the two commands is one clock. However, since the output buffer then becomes
High-Z after the clocks defined by l
interrupted, if the precharge command is input during burst read. To read all data by burst read, the clocks
defined by l
READ to PRECHARGE Command Interval (same bank): To output all data
CAS Latency = 2, Burst Length = 4
Command
CAS Latency = 3, Burst Length = 4
Command
CLK
CLK
Dout
Dout
EP
must be assured as an interval from the final data output to precharge command execution.
READ
READ
CL=2
CL=3
HZP
, there is a case of interruption to burst read data output will be
out A0
HM5212165F/HM5212805F-75/A60/B60
out A1
out A0
PRE/PALL
PRE/PALL
out A2
out A1
l
EP
= -1 cycle
l
EP
= -2 cycle
out A3
out A2
out A3
33