hd61203u Renesas Electronics Corporation., hd61203u Datasheet
hd61203u
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hd61203u Summary of contents
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... It provides 64 driver output lines and the impedance is low enough to drive a large screen. As the HD61203U is produced by a CMOS process fit for use in portable battery-driven equipment utilizing the liquid crystal display’s low power consumption. The user can easily construct a dot matrix liquid crystal graphic display system by combining the HD61203U and the column (segment) driver HD61202U ...
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... HD61203U Ordering Information Type No. Package HD61203UFS 100-pin plastic QFP (FP-100A) HD61203UTE 100-pin thin plastic QFP (TFP-100B) HCD61203U Chip 2 ...
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... HD61203UFS 66 (FP-100A (Top view) HD61203U X43 X44 X45 X46 X47 X48 X49 X50 X51 X52 X53 X54 X55 X56 X57 X58 X59 X60 X61 X62 X63 X64 V EE V6R V5R ...
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... X11 9 X10 V6L 21 V5L 22 V2L 23 V1L HD61203UTFIA (TFP-100B) (Top view) 75 X45 74 X46 73 X47 72 X48 71 X49 70 X50 69 X51 68 X52 67 X53 66 X54 65 X55 64 X56 63 X57 62 X58 X59 61 60 X60 59 X61 ...
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... X61 1513 96 63 X60 1513 –317 –187 64 1513 97 X59 65 X58 1513 – X57 1513 73 99 100 HD61203U m 2 Coordinate PAD Name X Y 1513 203 X56 1513 333 X55 1513 463 X54 1513 593 X53 X52 1513 723 X51 1513 ...
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... HD61203U Block Diagram 6 ...
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... Oscillator The CR oscillator generates display timing signals and operating clocks for the HD61202U required when the HD61203U is used with the HD61202U. An oscillation resister Rf and an oscillation capacitor Cf are attached as shown in Figure 1. When using an external clock, input the clock into terminal CR and don’ ...
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... The timing generator circuit generates display timing and operating clock for the HD61202U. This circuit is required when the HD61203U is used with the HD61202U. Connect terminal M/S to high level (master mode not necessary when the display timing signal is supplied from other circuits, for example, from HD61830 ...
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... I/O common terminals DL, DR, CL2, and the output state. M/S = GND: Slave mode The timing operation circuit stops operating. The HD61203U is used in this mode when combined with the HD61830. Even if combined with the HD61202U, this mode is used when display timing signals (M, data, CL2, etc ...
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... HD61203U Terminal Number of Name Terminals I DS1, DS2 2 I STB CL1 1 CR ø1, ø Connected to Functions V or GND Selects frequency. CC When the frame frequency is 70 Hz, the oscillation frequency should be 430 kHz at FCS = V OSC f = 215 kHz at FCS = GND OSC This terminal is active only in the master mode ...
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... Not used. Don’t connect any lines to this terminal GND Selects shift direction of bidirectional shift register. CC SHL Shift Direction GND DL DR HD61203U ) or DR (when SHL = GND). GND CC GND V GND CC Output Input Output Output Output Input Common Scanning Direction ...
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... HD61203U Terminal Number of Name Terminals I/O X1–X64 Connected to Functions Liquid crystal Liquid crystal display driver output display Output one of the four liquid crystal display driver M Data Output level When SHL corresponds to COM1 and CC X64 corresponds to COM64. When SHL is GND, X64 corresponds to COM1 and X1 corresponds to COM64 ...
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... Example of Application HD61203U Connection List HD61203U 13 ...
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... HD61203U Outline of HD61203U System Configuration Use with HD61830 1. When display duty ratio of LCD is 1/64 HD61830 COM1 No. 1 COM64 HD61830 COM1 COM64 No. 1 COM1 COM64 HD61830 No. 1 COM1 COM64 COM1 COM64 No When display duty ratio of LCD is from 1/65 to 1/128 HD61830 No. 1 COM1 COM128 No ...
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... HD61202Us. One HD61203U drives Upper upper and lower panels and supplies timing signals to the HD61202Us. Lower Two HD61203Us drive Upper upper and lower panels in parallel to ensure the quality of display. Lower No. 1 supplies timing signals to No. 2 and the HD61202Us. ...
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... HD61203U Connection Example 1 Use with HD61202U (RAM Type Segment Driver) 1. 1/64 duty ratio (see Connection List + V1L, V1R – V6L, V6R + R1 R3 – – – V5L, V5R + V2L, V2R Contrast – ...
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... Figure 4 Example 1 Waveform (RAM Type, 1/64 Duty Cycle) HD61203U 17 ...
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... HD61203U Connection Example 2 Use with HD61830 (Display Controller) 1. 1/64 duty ratio (see Connection List A) Open Open V1L, V1R V6 V6L, V6R V5 V5L, V5R V2 V2L, V2R GND GND Open FRM Open ø1 Open ø SHL = Low ...
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... HD61830 From Figure 6 Example 2 Waveform (1/64 Duty Ratio) HD61203U 19 ...
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... HD61203U 2. 1/100 duty ratio (see Connection List GND FLM MA MB Open V CC Open Note SHL = Low Figure 7 Example 2 (1/100 Duty Ratio Open Open SHL CC V1L, V1R DS1 V6L, V6R DS2 V5L, V5R TH V2L, V2R ...
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... HD61830 1 No. HD61203U Figure 8 Example 2 Waveform (1/100 Duty Ratio) HD61203U 2 No. HD61203U 21 ...
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... HD61203U Absolute Maximum Ratings Item Symbol Power supply voltage ( Power supply voltage ( Terminal voltage ( Terminal voltage ( Operating temperature T opr Storage temperature T stg Notes LSIs are used beyond absolute maximum ratings, they may be permanently destroyed. We strongly recommend you to use the LSI within electrical characteristic limits for normal operation, because use beyond these conditions will cause malfunction and poor reliability ...
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... V — 1.5 k — 1.0 A — 2.0 A — 600 kHz — 1500 kHz 450 585 kHz — 1.0 mA — 200 A — 100 A HD61203U *14 Test Conditions Notes –0 0 –V = 10V Load current 150 A Vin = Vin = ...
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... DS1, DS2, FS, SHL, STB, FCS and CR is connected to V GND and the terminals CL2, M, and DL are respectively connected to terminals CL2, M, and DL of the HD61203U under the condition described in note 9. 11. This value is specified for current flowing through V Don’t connect any lines to terminal V. ...
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... Specified at +75 C for die products. = 10V EE – 1/7 (V – 1/7 (V – RON – Range of power supply voltage for liquid crystal display drive 3 – Correlation between power supply voltage V – HD61203U Terminal X (X1 to X64) 16 (V) and V 25 ...
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... HD61203U Terminal Configuration Input Terminal I/O Terminal Output Terminal V CC PMOS NMOS Output Terminal 26 Applicable terminals CR, M/S, SHL, FCS, DS1, DS2, FS PMOS NMOS Applicable terminals: DL, DR, CL2 (Input circuit) PMOS V CC PMOS NMOS NMOS Output circuit (tristate) Applicable terminals: ø1, ø2, FRM ...
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... WHCL2H t 100 — 100 — — — — DHW t — — — — (includes jig capacitance) HD61203U t WLCL2H t WHCL2L Max Unit Note — ns — ns — ns — ns — ns — ns 200 ns 1 — ...
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... HD61203U 3. In the master mode (M 0 CL2 WCL2L 0 (SHL = (SHL = GND (SHL = (SHL = GND) 0 DFRM 0.7 V FRM 0 ø Wø1L ø FCS = pF WCL2H 0 0 ...
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... HD61203U Unit ...
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... HD61203U Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document ...