SI52146-A01AGM SILABS [Silicon Laboratories], SI52146-A01AGM Datasheet

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SI52146-A01AGM

Manufacturer Part Number
SI52146-A01AGM
Description
PCI-EXPRESS GEN 1, GEN 2, & GEN 3 SIX OUTPUT CLOCK GENERATOR
Manufacturer
SILABS [Silicon Laboratories]
Datasheet

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Part Number:
SI52146-A01AGM
Manufacturer:
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Quantity:
20 000
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SI52146-A01AGM
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Part Number:
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Part Number:
SI52146-A01AGMR
Manufacturer:
SILICON LABS/芯科
Quantity:
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P C I - E
C
Features
Applications
Description
The Si52146 is a spread-controlled PCIe clock generator that can source
six PCIe clocks simultaneously. The device has six hardware inputs for
enabling the respective outputs on the fly while powered on along with the
spread control hardware pin to enable Spread for EMI reduction.
Functional Block Diagram
Preliminary Rev. 0.1 12/11
L O C K
PCI-Express Gen 1, Gen 2, &
Gen 3 compliant
Low power push-pull type
differential output buffers
Integrated resistors on differential
clocks
Dedicated output enable pin for
each clock
Hardware selectable spread
control
Six PCI-Express clocks
Network attached storage
Multi-function printer
CKPWRGD/PDB
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
XIN/CLKIN
OE [5:0]
SDATA
XOUT
SSON
SCLK
X P R E S S
G
Control & Memory
E N E R A T O R
Control
RAM
G
E N
(SSC)
PLL1
Copyright © 2011 by Silicon Laboratories
1 , G
25 MHz crystal input or clock
input
I
capabilities
Triangular spread spectrum
profile for maximum
electromagnetic interference
(EMI) reduction
Industrial temperature:
–40 to 85
3.3 V Power supply
32-pin QFN package
Wireless access point
Routers
2
C support with readback
Divider
E N
o
C
2 , & G
DIFF0
DIFF2
DIFF3
DIFF5
DIFF1
DIFF4
E N
3 S
Patents pending
Notes:
1. Internal 100 kohm pull-up.
2. Internal 100 kohm pull-down.
I X
SSON
VDD
OE2
OE3
OE4
OE5
VDD
NC
1
2
1
1
1
Ordering Information:
O
1
2
3
4
5
6
7
8
Pin Assignments
32
9
U T P U T
S i 5 2 1 4 6
31
See page 18
10
30
11
29
12
GND
33
28
13
27
14
26
15
25
16
24
23
22
21
20
19
18
17 DIFF3
Si52146
VDD
DIFF5
DIFF5
VDD
DIFF4
DIFF4
DIFF3

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SI52146-A01AGM Summary of contents

Page 1

... Multi-function printer  Description The Si52146 is a spread-controlled PCIe clock generator that can source six PCIe clocks simultaneously. The device has six hardware inputs for enabling the respective outputs on the fly while powered on along with the spread control hardware pin to enable Spread for EMI reduction. ...

Page 2

... Si52146 2 Preliminary Rev. 0.1 ...

Page 3

... PDB (Power down) Assertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.4. PDB Deassertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.5. OE Clarification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.6. OE Assertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.7. OE Deassertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.8. SSON Clarification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3. Test and Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 4. Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.1. Serial Data Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.2. Data Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 5. Pin Descriptions: 32-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Preliminary Rev. 0.1 Si52146 Page 3 ...

Page 4

... Si52146 1. Electrical Specifications Table 1. DC Electrical Specifications Parameter Symbol 3.3 V Operating Voltage VDD core 3.3 V Input High Voltage 3.3 V Input Low Voltage Input High Voltage V Input Low Voltage V Input High Leakage Current Input Low Leakage Current 3.3 V Output High Voltage (SE) 3.3 V Output Low Voltage (SE) ...

Page 5

... Td=12 ns), High Band, 1.5 MHz < F < Nyquist Includes PLL BW 2–4 MHz, GEN3 CDR = 10 MHz) Measured differential ACC /T Measured differentially from R F ±150 mV HIGH LOW Preliminary Rev. 0.1 Si52146 Min Typ Max — — 250 47 — 53 and 0.5 — 4.0 DD — — 250 — ...

Page 6

... Si52146 Table 3. Absolute Maximum Conditions Parameter Main Supply Voltage Input Voltage Temperature, Storage Temperature, Operating Ambient Temperature, Junction Dissipation, Junction to Case Dissipation, Junction to Ambient ESD Protection (Human Body Model) Flammability Rating Moisture Sensitivity Level Note: While using multiple power supplies, the voltage on any input or I/O pin cannot exceed the power pin during power-up. ...

Page 7

... Trim capacitors are calculated to provide equal capacitive loading on both sides. Table 4. Crystal Recommendations Shunt Motional Cap (max) (max) 12– 0.016 pF Figure 2. Crystal Loading Example Preliminary Rev. 0.1 Si52146 Tolerance Stability Aging (max) (max) (max) 35 ppm 30 ppm 5 ppm 7 ...

Page 8

... Si52146 Use the following formulas to calculate the trim capacitor values for Ce1 and Ce2. Load Capacitance (each side – (Cs + Ci) Total Capacitance (as seen by the crystal CLe ( 1 + Ce1 + Cs1 + Ci1 Ce2 + Cs2 + Ci2 CL: Crystal load capacitance  CLe: Actual loading seen by crystal using standard value trim capacitors  ...

Page 9

... " Figure 3. 0.7 V Differential Load Configuration Figure 4. Differential Output Signals (for AC Parameters Measurement 0 0 Preliminary Rev. 0.1 Si52146 ...

Page 10

... Si52146 V MIN Figure 5. Single-ended Measurement for Differential Output Signals 10 = –0.30V V = –0.30V MIN (for AC Parameters Measurement) Preliminary Rev. 0.1 ...

Page 11

... Acknowledge from slave 37:30 Byte Count from slave—8 bits 38 Acknowledge 46:39 Data byte 1 from slave—8 bits 47 Acknowledge 55:48 Data byte 2 from slave—8 bits 56 Acknowledge .... Data bytes from slave/Acknowledge .... Data Byte N from slave—8 bits .... NOT Acknowledge .... Stop Preliminary Rev. 0.1 Si52146 Description 11 ...

Page 12

... Si52146 Table 6. Byte Read and Byte Write Protocol Byte Write Protocol Bit Description 1 Start 8:2 Slave address–7 bits 9 Write 10 Acknowledge from slave 18:11 Command Code–8 bits 19 Acknowledge from slave 27:20 Data byte–8 bits 28 Acknowledge from slave 29 Stop 12 Byte Read Protocol Bit ...

Page 13

... Output Enable for DIFF0. 0: Output disabled. 1: Output Enabled. 3 Reserved 2 DIFF1_OE Output Enable for DIFF1. 0: Output disabled. 1: Output enabled. 1 Reserved 0 DIFF2_OE Output Enable for DIFF2. 0: Output disabled. 1: Output enabled R/W R/W R/W Function DIFF0_OE R/W R/W R/W Function Preliminary Rev. 0.1 Si52146 R/W R/W R DIFF1_OE DIFF2_OE R/W R/W R/W 13 ...

Page 14

... Si52146 Control Register 2. Byte 2 Bit D7 D6 DIFF3_OE DIFF4_OE Name R/W R/W Type Reset settings = 11100000 Bit Name 7 DIFF3_OE Output Enable for DIFF3. 0: Output disabled. 1: Output enabled. 6 DIFF4_OE Output Enable for DIFF4. 0: Output disabled. 1: Output enabled. 5 DIFF5_OE Output Enable for DIFF5. 0: Output disabled. 1: Output enabled. ...

Page 15

... Function D5 R/W Function Amplitude Control for DIFF Differential Outputs. 0: Differential outputs with Default amplitude. 1: Differential outputs amplitude is set by Byte 5[6:4]. DIFF Differential Outputs Amplitude Adjustment. 000: 300 mV 001: 400 mV 010: 500 mV 100: 700 mV 101: 800 mV 110: 900 mV Preliminary Rev. 0.1 Si52146 R/W R/W R ...

Page 16

... SSON OE3 1 5 OE4 1 OE5 VDD 8 Notes: 1. Internal 100 kohm pull-up. 2. Internal 100 kohm pull-down. Table 7. Si52146 32-Pin QFN Descriptions Pin # Name Type PWR 3.3 V power supply 1 VDD I,PU 2 OE2 I, PD 3.3 V-tolerant input for enabling –0.5% spread on DIFF clocks 3 SSON I,PU 4 OE3 I,PU 5 ...

Page 17

... Table 7. Si52146 32-Pin QFN Descriptions Pin # Name Type O, DIF 0.7 V, 100 MHz differential clock 12 DIFF1 PWR 3.3 V power supply 13 VDD O, DIF 0.7 V, 100 MHz differential clock 14 DIFF2 O, DIF 0.7 V, 100 MHz differential clock 15 DIFF2 PWR 3.3 V power supply 16 VDD O, DIF 0.7 V, 100 MHz differential clock 17 DIFF3 O, DIF 0.7 V, 100 MHz differential clock ...

Page 18

... Si52146 6. Ordering Guide Part Number Lead-free Si52146-A01AGM Si52146-A01AGMR 18 Package Type 32-pin QFN 32-pin QFN—Tape and Reel Preliminary Rev. 0.1 Temperature Industrial, – C Industrial, – C ...

Page 19

... Package Outline Figure 6 illustrates the package details for the Si52146. Table 8 lists the values for the dimensions shown in the illustration. Figure 6. 32-Pin Quad Flat No Lead (QFN) Package Table 8. Package Diagram Dimensions Symbol Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted ...

Page 20

... Si52146 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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