SI52146-A01AGM SILABS [Silicon Laboratories], SI52146-A01AGM Datasheet - Page 16

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SI52146-A01AGM

Manufacturer Part Number
SI52146-A01AGM
Description
PCI-EXPRESS GEN 1, GEN 2, & GEN 3 SIX OUTPUT CLOCK GENERATOR
Manufacturer
SILABS [Silicon Laboratories]
Datasheet

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Si52146
5. Pin Descriptions: 32-Pin QFN
16
Pin #
10
11
1
2
3
4
5
6
7
8
9
SSON
DIFF0
DIFF0
DIFF1
Name
VDD
VDD
OE2
OE3
OE4
OE5
NC
Notes:
1. Internal 100 kohm pull-up.
2. Internal 100 kohm pull-down.
SSON
OE2
OE5
VDD
OE3
OE4
VDD
NC
1
2
1
1
1
Table 7. Si52146 32-Pin QFN Descriptions
O, DIF 0.7 V, 100 MHz differential clock
O, DIF 0.7 V, 100 MHz differential clock
O, DIF 0.7 V, 100 MHz differential clock
1
2
3
4
5
6
7
8
Type
PWR 3.3 V power supply
I, PD 3.3 V-tolerant input for enabling –0.5% spread on DIFF clocks
PWR 3.3 V power supply
I,PU
I,PU
I,PU
I,PU
NC
32
9
Refer to Table 1 on page 4 for OE specifications.
(internal 100 k pull-down)
Refer to Table 1 on page 4 for OE specifications.
Refer to Table 1 on page 4 for OE specifications.
Refer to Table 1 on page 4 for OE specifications.
No connect
3.3 V input to disable DIFF2 (internal 100 k pull-up).
3.3 V input to disable DIFF3 (internal 100 k pull-up).
3.3 V input to disable DIFF4 (internal 100 k pull-up).
3.3 V input to disable DIFF5 (internal 100 k pull-up).
31
10
30
11
Preliminary Rev. 0.1
29
12
GND
33
28
13
27
14
26
15
25
16
Description
24
23
22
21
20
19
18
17 DIFF3
VDD
DIFF5
DIFF5
VDD
DIFF4
DIFF4
DIFF3

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