kac-9638 ETC-unknow, kac-9638 Datasheet - Page 5

• Manufacturer Part Number: kac-9638
• Description: Kodak Kac-9638 Cmos Image Sensor
• Manufacturer: ETC-unknow

IMAGE SENSOR SOLUTIONS
Pin Descriptions
KAC-9638
www.kodak.com/go/imagers 585-722-4385
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Name
vss_pix
vss_od1
vdd_od1
RSVD
RSVD
sadr
sda
sclk
extsync
snapshot
vcp2
vcp1
hsync
vsync
pclk
mclk
vss_dig
vdd_dig
d0
d1
d2
d3
d4
d5
d6
I/O
I
I
I
I
IO
I
O
I
O
O
IO
IO
IO
I
I
I
O
O
O
O
O
O
O
Typ
P
P
P
D
D
D
D
D
A
A
D
D
D
D
P
P
D
D
D
D
D
D
D
Description
0 volt supply for the pixel array
0 volt supply for the digital IO buffers
3.0 volt supply for the digital IO buffers, connect to vss_od1 via a 0.1µf capacitor. .
This pin is reserved and should not be connected.
This pin is reserved and should not be connected.
Input pin with pull down resistor. This pin is used to program different slave addresses for
the sensor in an I
I
I
The external event synchronization signal is used to synchronize external events in
snapshot mode.
Input pin with pull down resistor used to activate (trigger) a snapshot sequence.
Analog charge pump output, connect to vss_ana via a 0.1µf capacitor. Voltage on this
pin should be 5.0 volt.
Analog charge output, connect to vss_ana via a 56pf capacitor. Voltage on this pin
should be vdd_ana +0.3 volt.
This is a dual mode pin. When the sensor’s digital video port is configured to be a mas-
ter, this pin is an output and is used as the horizontal synchronization pulse. When the
sensor’s digital video port is configured to be a slave, (the default), this pin is an input
and is used as the row trigger.
This is a dual mode pin. When the sensor’s digital video port is configured to be a mas-
ter, this pin is an output and is used as the vertical synchronization pulse. When the sen-
sor’s digital video port is configured to be a slave, (the default), this pin is an input and is
used as the frame trigger.
Pixel clock.
Sensor’s master clock input.
0 volt power supply for the digital circuits.
3.0 volt power supply for the digital circuits, connect to vss_dig via a 0.1µf capacitor. .
Bit 0 of the digital video output bus. This output can be put into tri-stated.
Bit 1 of the digital video output bus. This output can be put into tri-stated.
Bit 2 of the digital video output bus. This output can be put into tri-stated.
Bit 3 of the digital video output bus. This output can be put into tri-stated.
Bit 4 of the digital video output bus. This output can be put into tri-stated.
Bit 5 of the digital video output bus. This output can be put into tri-stated.
Bit 6 of the digital video output bus. This output can be put into tri-stated.
2
2
C compatible serial interface data bus. This is an open drain I/O.
C compatible serial interface clock. This is an open drain I/O.
2
C compatible system.
5
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