74LVC1G08GW/DG,125 NXP Semiconductors, 74LVC1G08GW/DG,125 Datasheet - Page 6

• Manufacturer Part Number: 74LVC1G08GW/DG,125
• Description: IC 2-INPUT AND GATE UMT5
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC1G08GW/DG,125

• Number Of Circuits: 1
• Logic Type: AND Gate
• Number Of Inputs: 2
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 1.65 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
• Logic Family: 74LVC
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Output Current: 50 mA
• Output Voltage: 0 V to 5.5 V
• Power Dissipation: 250 mW
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVC1G08GW/DG-G; 74LVC1G08GW/DG-G; 935283544125

NXP Semiconductors
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for load circuit see
[1]
[2]
[3]
12. AC waveforms
74LVC1G08
Product Specification
Symbol Parameter
t
C
pd
Fig 7.
PD
Typical values are measured at T
t
C
P
f
f
C
V
N = number of inputs switching;
∑(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
propagation delay A, B to Y; see
power dissipation
capacitance
Measurement points are given in
V
The input A, B to output Y propagation delays
PD
OL
Dynamic characteristics
CC
× V
and V
2
× f
CC
o
2
) = sum of outputs.
OH
× f
PLZ
i
are typical output voltage levels that occur with the output load.
× N + ∑(C
and t
PZL
Conditions
V
.
L
I
V
V
V
V
V
= GND to V
× V
amb
CC
CC
CC
CC
CC
CC
A, B input
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
= 25 °C and V
Y output
2
× f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
GND
CC
Figure 7
V
V
9.
OH
OL
V
; V
I
CC
Rev. 8 — 19 October 2010
CC
= 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
= 3.3 V
V
D
M
in μW).
V
M
t
[2]
[3]
PHL
Figure
Min
1.0
0.5
0.5
0.5
0.5
-
−40 °C to +85 °C
8.
Typ
3.4
2.2
2.5
2.1
1.7
16
[1]
mna614
t
PLH
Max
8.0
5.5
5.5
4.5
4.0
-
Single 2-input AND gate
74LVC1G08
−40 °C to +125 °C
Min
1.0
0.5
0.5
0.5
0.5
-
© NXP B.V. 2010. All rights reserved.
Max
10.5
7.0
7.0
6.0
5.5
-
6 of 17
ns
Unit
ns
ns
ns
ns
pF