ch7301c Chrontel, ch7301c Datasheet - Page 18
ch7301c
Manufacturer Part Number
ch7301c
Description
Ch7301 Dvi Transmitter
Manufacturer
Chrontel
Datasheet
1.CH7301C.pdf
(29 pages)
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CHRONTEL
Hot Plug Detection Register
HPDD (bit 2) of register HPD disables the hardware hot plug detection function. This function (default on) tri-states the
DVI outputs when the hot plug detect pin (HPDET) is pulled low in accordance with the DVI specification, revision 1.0.
This function is independent of the hot plug interrupt function (HPIE, register 20h, bit 7) controlled via the SPP interface.
HPDD = 0 => hardware hot plug interrupt is enabled
DVI Control Input Register
Bits 3-0 of register TCTL set the DVI control inputs applied to the green and red channels during sync intervals. It
is recommended to leave these controls at the default value.
Bits 7-4 of register TCTL control the DVI PLL phase detector. The default value is recommended.
18
DEFAULT:
DEFAULT:
SYMBOL:
SYMBOL:
TYPE:
TYPE:
= 1 => hardware hot plug interrupt is disabled
BIT:
BIT:
Reserved Reserved Reserved Reserved Reserved
TPPD3
R/W
R/W
7
1
7
0
TPPD 2
R/W
R/W
6
0
6
0
TPPD 1
R/W
R/W
5
0
5
0
TPPD 0
R/W
R/W
4
0
4
0
CTL3
R/W
R/W
3
0
3
0
201-0000-056
HPDD Reserved
CTL2
R/W
R/W
Symbol:
Address:
Symbol:
Address:
2
0
2
0
Rev. 1.32,
CTL1
R/W
R/W
CH7301C
1
0
1
0
HPD
23h
TCTL
31h
Reserved
5/24/2005
CTL0
R/W
R/W
0
0
0
0