ch7304 Chrontel, ch7304 Datasheet - Page 17

• Manufacturer Part Number: ch7304
• Description: Ch7304 Single Channel Lvds Transmitter
• Manufacturer: Chrontel

DEFAULT:
CHRONTEL
Color Space Control
RGB (bit 0) of Register CSC enables the YCrCb to RGB color space conversion for IDF4. This bit must be set to 1 to
enable YCrCb to RGB conversion.
Test Pattern Register
TSTP[1:0] (bits 1:0) of Register STP enable and select test pattern generation (color bar, ramp). This test pattern can be
used for both the LVDS output and the TV Output. The pattern generated is determined by the table below:
ResetDB (bit 3) of Register STP resets the datapath. When ResetDB is ‘0’ the datapath is reset. When ResetDB is ‘1’
the datapath is enabled. The datapath is also reset at power on by an internally generated power-on-reset signal.
ResetIB (bit 4) of Register STP resets all control registers. When ResetIB is ‘0’ the control registers are reset to the
default values. When ResetIB is ‘1’ the control registers operate normally. The control registers are also reset at power
on by an internally generated power on reset signal.
201-0000-053
DEFAULT:
SYMBOL:
SYMBOL:
TYPE:
TYPE:
RGB
BIT:
BIT:
Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Reserved
TSTP1
R/W
R/W
=
=
Rev. 1.31, 6/14/2006
7
0
7
0
0
0
1
1
0 => Disable YCrCb to RGB conversion
1 => Enable YCrCb to RGB conversion
Reserved
TSTP0
R/W
R/W
6
0
6
0
0
0
1
1
Reserved
Test Pattern
No test pattern – Input data is used
Color Bars
Horizontal Luminance Ramp
Black screen
R/W
R/W
5
0
5
0
Table 10: Test Pattern Selection
ResetIB
R/W
R/W
4
0
4
1
ResetDB
R/W
R/W
3
0
3
1
Reserved
R/W
R/W
2
0
2
0
Symbol:
Address:
Symbol:
Address:
TSTP1
R/W
R/W
1
0
1
0
CH7304
CSC
31h
STP
48h
TSTP0
RGB
R/W
R/W
0
0
0
0
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