DS2722-F-03 MICRO-LINEAR [Micro Linear Corporation], DS2722-F-03 Datasheet
DS2722-F-03
Related parts for DS2722-F-03
DS2722-F-03 Summary of contents
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... Analog RSSI output APPLICATIONS 900MHz FSK Data Transceivers § - Digital Cordless Phones - Wireless Streaming Media - Wireless PC Peripherals BLOCK DIAGRAM VCC5 24 23 TRFO 22 RVCC4 RRFI 21 20 GND 19 GND 18 GND 17 GND PUBLICATION DS2722-F-05 ML2722 Final Datasheet DECEMBER 2003 ...
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... PIN DESCRIPTIONS ....................................................................................................................................................7 FUNCTIONAL DESCRIPTION....................................................................................................................................13 MODES OF OPERATION ...........................................................................................................................................15 DATA INTERFACES ....................................................................................................................................................18 CONTROL INTERFACES AND REGISTER DESCRIPTIONS ...................................................................................20 PHYSICAL DIMENSIONS (INCHES/MILLIMETERS).................................................................................................27 ORDERING INFORMATION .......................................................................................................................................27 WARRANTY ................................................................................................................................................................28 CHANGE LOG VERSION DATE AUTHOR DS2722-F-03 9/26/03 Derby DS2722-F-04 10/13/03 Derby DS2722-F-05 12/12/03 Derby DS2722-F-05 CHANGES/COMMENTS Reformatted and updated from F02 Error on Page 21 Table 5 – Divide Ratio = fc / 0.512 Some graphics printed poorly to PDF ...
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... SIMPLIFIED APPLICATIONS DIAGRAM ANTENNA LNA RF PIN SWITCH DIODE DRIVERS SWITCH PA DS2722-F-05 ML2722 RRFI MATCHING NETWORK IMAGE REJECT MIXER PAON, TPC 2 TRFO QUADRATURE FILTER DIVIDE BY 2 1.83GHz VCO TX RF BUFFER Figure 1. Simplified Application Diagram FINAL DATASHEET ML2722 DOUT IF DEMOD CIRCUITS RSSI REF ...
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... LO lock up time for channel FH switch t LO lock up time from sleep WAKE V Reference signal input level FREF DS2722-F-05 = Operating Temperature Range (Note 1) 6.144 or A CONDITIONS T = 25°C, VCC5 & VDD = 3. Operating Temperature Range A In 512 KHz steps VCO phase locked, loop bandwidth 50KHz ...
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... RSSI minimum voltage RSMN G RSSI sensitivity, mid range RSMID P RSSI maximum signal RSMX P RSSI minimum signal RSMN RSSI accuracy DS2722-F-05 f =915 MHz c f =915 MHz c FSK modulation, fdev=+/-460KHz For better than 12.5% CER 3dB nominal <12.5% CER at 1.536Mchip/s Test tones 2 and 4 channels away Measured at 3.5MHz offset -80dBm wanted signal < ...
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... Channel switching time RXEN t Chip enable time XCEN Note 1: Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions. DS2722-F-05 When matched into 50 902 to 928 MHz 5 consecutive bits Between 50 s and 10 ms after PAON high 3dB Bandwidth never exceed VDD measured at 1MHz Sourcing 0 ...
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... VCC5 I (analog) 25 GND I (analog) 27 RVCC6 O (analog) DS2722-F-05 FUNCTION Ground for digital I/O circuits and control logic. DC power supply decoupling point for the PLL dividers, phase detector, and charge pump. This pin is connected to the output of the regulator and to the PLL supplies. There must be a capacitor to ground from this pin to decouple (bypass) noise and to stabilize the regulator ...
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... O (analog) 31 VDD I (digital) TRANSMIT/RECEIVE 21 RRFI I (analog) DS2722-F-05 FUNCTION and to stabilize the regulator. DC power supply decoupling point for IF, Demodulator, and Data Slicer circuits. A capacitor must be tied between this pin and ground to decouple (bypass) noise and to stabilize the regulator. DC power supply input to the interface logic and control registers ...
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... O (analog) DATA 30 DIN I (CMOS) 32 DOUT O (CMOS) DS2722-F-05 FUNCTION Transmit RF Output. This output is an emitter follower and should be AC coupled. Transmit Data Input. Drives the transmit pulse shaping circuits. Serial digital data on this pin becomes FSK modulation on the Transmit RF output. The logic timing on this pin controls data timing ...
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... XCEN I (CMOS) 2 RXON I (CMOS) 3 PAON O (CMOS) DS2722-F-05 FUNCTION Enables the bandgap reference and voltage regulators when high. With XCEN low the device consumes only leakage current in STANDBY mode when low. XCEN low also preserves register contents and allows register writes. This is a CMOS input, and the thresholds are referenced to VDD and VSS ...
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... O (open drain) 9 REF I 11 QPO O DS2722-F-05 FUNCTION Transmit power control output. This open-drain output is pulled low when the TPC bit in serial register #0 is set. Transitions on TPC are synchronized to the falling edge of RXON. In analog test modes, this pin and the RSSI output become test access points controlled by the serial control bus ...
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... EN I (CMOS) 5 DATA I (CMOS) 6 CLK I (CMOS) DS2722-F-05 FUNCTION VCO Tuning Voltage input from the PLL loop filter. This pin is very sensitive to noise coupling and leakage currents. Internal Bandgap Reference Voltage. Decoupled to ground with a 220nF capacitor. Buffered Analog RSSI output with a nominal sensitivity of 35mV/dB input signal range of – ...
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... This frequency-agile synthesizer allows the ML2722 to be used in frequency hopped spread spectrum (FHSS) applications with nominal channel spacing of 2.048MHz. Carrier frequency is programmed via the configuration registers and 3-wire serial interface. The VCO tank circuit (inductor and varactor) is fully integrated. RVCC3 DS2722-F-05 470 2.2nF QPO Example 38KHz Loop Filter ...
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... VDD 31 VBG 26 DC VCC5 24 REGULATORS QUADRATURE MIXERS RRFI BUFFER TRFO VSS QPO GND DS2722-F-05 RVCC1 RVCC3 RVCC4 RVCC6 DEMOD LIM ITER FILTER RSSI REFERENCE LOCK DIVIDER DETECT LO PHASE/ LO 6-BIT FREQUENCY COUNTER DETECTOR LO CHARGE PRESCALER PUMP ...
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... The ML2722 receive chain is a Low IF receiver using advanced integrated radio techniques to eliminate external IF filters and minimize external RF filter requirements. The precision filtering and demodulation circuits give improved performance over conventional radio design using external filters while providing integration comparable to advanced direct conversion radio designs. DS2722-F-05 MODE TRANSCEIVER MODE STANDBY ...
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... The ML2722 should then be enabled with RXON high. The rising edge on XCEN will trigger a complete calibration of all the on chip filters, which takes 320µs. This ensures the modulation filters are aligned to prevent unwanted spurious emissions. DS2722-F-05 RSSI voltage vs RF Level 3.00 2 ...
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... The filter alignment registers are reset at power up. TEST MODE The RF to digital functionality of the ML2722 requires special test mode circuitry for IC production test and radio debugging. A test register, available via the 3-wire serial interface, controls the test multiplexers. DS2722-F-05 CHANNEL FREQUENCY IN MHz 1 903.680 2 905 ...
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... CLK pin. The information is latched when EN goes high. This serial interface bus is similar to that commonly found on PLL devices. The data latches are implemented in static CMOS and use minimal power when the bus is inactive. Table 3 and Figure 4 provide timing and register programming illustrations. DS2722-F-05 FINAL DATASHEET DECEMBER 2003 ...
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... MSB DB13 DB12 DATA REGISTER DATA (14 BITS) EN Figure 4. Serial Bus Timing for Address and Data Programming DS2722-F-05 PARAMETER Clock input rise time Clock input fall time Clock period Minimum pulse width Delay from last clock falling edge Enable setup time to ignore next rising clock ...
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... CHQ9 B15 B14 B13 B12 MSB DB13 DB12 DB11 DB10 DB9 Res. Res. Res. Res. Res. B15 B14 B13 B12 DS2722-F-05 14-bit Data DB8 DB7 DB6 DB5 DB4 Res. Res. Res. TPC B11 B10 14-bit Data DB8 DB7 DB6 DB5 ...
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... B6 / DB4 CHQ4 B5 / DB3 CHQ3 B4 / DB2 CHQ2 B3 / DB1 CHQ1 B2 / DB0 CHQ0 B1 / ADB1 ADR1 B0 (LSB) / ADB0 ADR0 DS2722-F-05 DESCRIPTION Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Transmit Power Control 0: TPC pin high impedance 1: TPC pin pulled to ground Transmit Test Mode 0: FSK modulation in Transmit mode ...
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... Bits identified as reserved must always have a logic 0 (zero) value for correct device operation. Power-on reset clears all reserved bits to zero. Each reserved bit must be programmed to logic zero whenever any of the three registers are reprogrammed. DS2722-F-05 DESCRIPTION Reserved Digital Test Control Bits ...
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... This bit is used in Receive mode to put the PLL into either open loop or closed loop (see Table 9). PLL Frequency Shift Bit (LOL): DB3 LO shift for transmit and receive. For normal operations recommended that LOL = 0 (see Table 10). LOL 0 1 DS2722-F-05 PLL CHARGE PUMP POLARITY Table 7. PLL Charge Pump Polarity NOMINAL REFERENCE FREQUENCY ...
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... RECEIVE mode to accommodate the IF frequency. The recommended operating range value of the CHQ is from 1,024 (400 hex) to 4093 (FFD hex). These bits should be programmed to a valid channel frequency before XCEN is asserted. The divide ratio is calculated as f MHz. DS2722-F-05 TXCL TRANSMIT PLL MODE 0 ...
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... In the Receive chain, FM demodulation, data filtering, and data slicing take place in the ML2722 receiver, with chip, bit and word rate timing recovery performed in the baseband processor. RSSI AND REF There are two other interface pins between the ML2722 transceiver and the baseband IC: the RSSI/TPI (pin 28) and REF (pin 9). DS2722-F-05 ATM0 RSSI/TPI 0 RSSI ...
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... The associated RF input and output ground pins must have direct connections ground plane, and the RF block supply pins must be well decoupled to the RF ground pins. f GHZ 0.9 RRFI S-PARAMETERS AT 3.3 V, OPERATING TEMPERATURE 25 Table 16. Typical Receive RF Input DS2722-F-05 SYMBOL Figure 6 ...
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... TQFP 25 0.276 BSC 0.354 BSC (7.00 BSC) (9.00 BSC) 17 0.048 MAX 0.012 - 0.018 (1.20 MAX) (0.29 - 0.45) 0.037 - 0.041 (0.95 - 1.05) Leads cannot exceed 0.004 maximum coplanarity (0.102) FINAL DATASHEET ML2722 0 º º 0.003 - 0.008 (0.09 - 0.20) 0.018 - 0.030 (0.45 - 0.75) SEATING PLANE PACKAGE PUBLICATION 32 Pin TQFP 7mm body DS2722-F-04 DECEMBER 2003 27 ...
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... Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending. DS2722-F-05 Micro Linear Corporation 2050 Concourse Drive San Jose, CA 95131 ...