DS1972-F3 MAXIM [Maxim Integrated Products], DS1972-F3 Datasheet - Page 21

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DS1972-F3

Manufacturer Part Number
DS1972-F3
Description
1024-Bit EEPROM iButton
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
CRC GENERATION
With the DS1972 there are two different types of CRCs. One CRC is an 8-bit type and is stored in the most
significant byte of the 64-bit ROM. The bus master can compute a CRC value from the first 56 bits of the 64-bit
ROM and compare it to the value stored within the DS1972 to determine if the ROM data has been received error-
free. The equivalent polynomial function of this CRC is X
(noninverted) form. It is computed at the factory and lasered into the ROM.
The other CRC is a 16-bit type, generated according to the standardized CRC16-polynomial function
x
scratchpad. In contrast to the 8-bit CRC, the 16-bit CRC is always communicated in the inverted form. A CRC
generator inside the DS1972 iButton (Figure 13) calculates a new 16-bit CRC, as shown in the command flow chart
(Figure 7). The bus master compares the CRC value read from the device to the one it calculates from the data,
and decides whether to continue with an operation or to reread the portion of the data with the CRC error.
With the Write Scratchpad command, the CRC is generated by first clearing the CRC generator and then shifting in
the command code, the Target Addresses TA1 and TA2, and all the data bytes as they were sent by the bus
master. The DS1972 transmits this CRC only if E2:E0 = 111b.
With the Read Scratchpad command, the CRC is generated by first clearing the CRC generator and then shifting in
the Command code, the target addresses TA1 and TA2, the E/S byte, and the scratchpad data as they were sent
by the DS1972. The DS1972 transmits this CRC only if the reading continues through the end of the scratchpad.
For more information on generating CRC values, refer to Application Note 27.
Figure 13. CRC-16 Hardware Description and Polynomial
COMMAND-SPECIFIC 1-Wire COMMUNICATION PROTOCOL—COLOR CODES
16
X
X
Master to slave
+ x
0
8
STAGE
STAGE
15
1
9
st
th
+ x
X
X
2
9
1
+ 1. This CRC is used for fast verification of a data transfer when writing to or reading from the
STAGE
STAGE
10
2
nd
th
Slave to master
X
10
STAGE
11
th
X
11
STAGE
X
12
2
STAGE
th
3
Programming
Polynomial = X
rd
X
12
STAGE
X
13
3
STAGE
th
4
th
X
13
21 of 23
STAGE
X
14
16
4
STAGE
+ X
th
8
5
+ X
th
X
15
14
+ X
STAGE
5
X
15
+ X
5
STAGE
2
th
+ 1
6
4
th
+ 1. This 8-bit CRC is received in the true
INPUT DATA
X
6
STAGE
7
th
X
X
15
7
STAGE
STAGE
16
8
th
th
X
16
CRC
OUTPUT

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