DS1972-F3 MAXIM [Maxim Integrated Products], DS1972-F3 Datasheet - Page 3

• Manufacturer Part Number: DS1972-F3
• Description: 1024-Bit EEPROM iButton
• Manufacturer: MAXIM [Maxim Integrated Products]

Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Note 18:
Note 19:
Note 20:
Note 21:
Note 22:
Note 23:
Note 24:
1)
EXAMPLES OF ACCESSORIES
EEPROM
Programming Current
Programming Time
Write/Erase Cycles (En-
durance) (Notes 21, 22)
Data Retention
(Notes 23, 24)
t
t
t
t
t
DS9096P
DS9101
DS9093RA
DS9093A
DS9092
Intentional change, longer recovery time requirement due to modified 1-Wire front end.
W0L
SLOT
RSTL
PDH
PDL
PARAMETER
PART
(incl. t
PARAMETER
Specifications at T
System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily
loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be required.
Maximum value represents the internal parasite capacitance when V
data line, 2.5µs after V
Guaranteed by design, characterization and/or simulation only. Not production tested.
V
capacitive loading on IO. Lower V
and V
Voltage below which, during a falling edge on IO, a logic 0 is detected.
The voltage on IO needs to be less or equal to V
Voltage above which, during a rising edge on IO, a logic 1 is detected.
After V
The I-V characteristic is linear for voltages less than 1V.
Applies to a single device attached to a 1-Wire line.
The earliest recognition of a negative edge is possible at t
Defines maximum possible bit rate. Equal to t
Interval after t
is t
Highlighted numbers are NOT in compliance with legacy 1-Wire product standards. See comparison table below.
e represents the time required for the pullup circuitry to pull the voltage on IO up from V
d represents the time required for the pullup circuitry to pull the voltage on IO up from V
master.
Current drawn from IO during the EEPROM programming interval. The pullup circuit on IO during the programming interval
should be such that the voltage at IO is greater than or equal to Vpup(min). If Vpup in the system is close to Vpup(min) then a low
impedance bypass of Rpup which can be activated during programming may need to be added.
Interval begins t
sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current drawn by the
device has returned from I
Write-cycle endurance is degraded as T
Not 100% production-tested; guaranteed by reliability monitor sampling.
Data retention is degraded as T
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data sheet
limit at operating temperature range is established by reliability testing.
REC
TL
PDH(max)
, V
)
TH
HY
Self-Stick Adhesive Pad
Multipurpose Clip
Mounting Lock Ring
Snap-In Fob
iButton Probe
TH
, and V
.
is crossed during a rising edge on IO, the voltage on IO has to drop by at least V
; maximum limit is t
RSTL
HY
STANDARD SPEED
WiLMIN
480µs
61µs
15µs
60µs
60µs
MIN
are a function of the internal supply voltage which is itself a function of V
during which a bus master is guaranteed to sample a logic-0 on IO if there is a DS1972 present. Minimum limit
A
= -40°C are guaranteed by design only and not production-tested.
DESCRIPTION
after the leading negative edge on IO for the last timeslot of the E/S byte for a valid Copy Scratchpad
PUP
SYMBOL
I
t
PROG
PROG
N
has been applied the parasite capacitance will not affect normal communications.
PROG
t
DR
CY
PDH(min)
(undef.)
(undef.)
to I
240µs
120µs
LEGACY VALUES
A
MAX
60µs
increases.
PUP
L
.
+ t
, higher R
(Note 5, 19)
(Note 20)
At 25°C
At 85°C (worst case)
At 85°C (worst case)
PDL(min)
A
increases.
.
OVERDRIVE SPEED
W0L(min)
PUP
48µs
MIN
7µs
2µs
8µs
6µs
IL(MAX)
, shorter t
CONDITIONS
+ t
at all times the master is driving IO to a logic-0 level.
3 of 23
REC(min)
REH
REC
(undef.)
MAX
80µs
24µs
16µs
after V
.
, and heavier capacitive loading all lead to lower values of V
6µs
TH
PUP
has been reached on the preceding rising edge.
is first applied. If a 2.2kW resistor is used to pull up the
STANDARD SPEED
65µs
480µs
15µs
60µs
60µs
MIN
1)
200k
MIN
50k
10
IL
IL
to V
to the input high threshold of the bus
(undef.)
HY
640µs
240µs
120µs
PUP
DS1972 VALUES
MAX
60µs
to be detected as logic '0'.
TH
, R
.
PUP
TYP
, 1-Wire timing, and
OVERDRIVE SPEED
8µs
48µs
MIN
2µs
8µs
6µs
MAX
1)
0.8
10
(undef.)
15.5µs
MAX
80µs
24µs
UNITS
6µs
years
TL
mA
ms
---
, V
TH
,