PLL520-38 PhaseLink (PLL), PLL520-38 Datasheet - Page 4

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PLL520-38

Manufacturer Part Number
PLL520-38
Description
, 65-130MHz In, 65-130MHz Out, Pecl
Manufacturer
PhaseLink (PLL)
Datasheet
4. General Electrical Specifications
5. Jitter specifications
*: To be measured
6. Phase noise specifications
Note: Phase Noise measured at VCON = 0V – to be measured.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Supply Current (Loaded Outputs)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
Period jitter RMS
Period jitter peak-to-peak
Integrated jitter RMS
Phase Noise
relative to carrier
PARAMETERS
PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
PARAMETERS
PARAMETERS
FREQUENCY
77.76MHz
SYMBOL
V
I
DD
DD
77.76MHz
77.76MHz
Integrated 12 kHz to 20 MHz at 77.76MHz
PECL/LVDS/CMOS
@ 1.25V (LVDS)
@ Vdd – 1.3V (PECL)
@10Hz
-75
CONDITIONS
CONDITIONS
@100Hz
-95
Preliminary
@1kHz
-125
PLL520-38/-39
MIN.
MIN.
3.13
45
45
Universal Low Phase Noise IC’s
@10kHz
-145
TYP.
TYP.
3.5*
0.5*
24*
50
50
50
@100kHz
Rev 4/09/02 Page 4
100/80/40
-155
MAX.
MAX.
3.47
55
55
dBc/Hz
UNITS
UNITS
UNITS
mA
mA
ps
ps
ps
%
V

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