bc41b143a07 ETC-unknow, bc41b143a07 Datasheet - Page 64

• Manufacturer Part Number: bc41b143a07
• Description: Single Chip Bluetooth
• Manufacturer: ETC-unknow

9.4.1
9.4.2
The UART interface for BlueCore4-ROM while the chip is being held in reset is tri-state. This will allow the user to daisy
chain devices onto the physical UART bus. The constraint on this method is that any devices connected to this bus
must tri-state when BlueCore4-ROM reset is de-asserted and the firmware begins to run.
9.4.3
Alternatively, for devices that do not tri-state the UART bus, the UART bypass mode on BlueCore4-ROM can be used.
The default state of BlueCore4-ROM after reset is de-asserted; this is for the host UART bus to be connected to the
BlueCore4-ROM UART, thereby allowing communication to BlueCore4-ROM via the UART. All UART bypass mode
connections are implemented using CMOS technology and have signalling levels of 0V and VDD_PADS.
In order to apply the UART bypass mode, a BCCMD command will be issued to BlueCore4-ROM. Upon this issue, it
will switch the bypass to PIO[7:4] as Figure 9.10 indicates. Once the bypass mode has been invoked, BlueCore4-ROM
will enter the Deep Sleep state indefinitely.
In order to re-establish communication with BlueCore4-ROM, the chip must be reset so that the default configuration
takes effect.
It is important for the host to ensure a clean Bluetooth disconnection of any active links before the bypass mode is
invoked. Therefore, it is not possible to have active Bluetooth links while operating the bypass mode.
9.4.4
The current consumption for a device in UART bypass mode is equal to the values quoted for a device in standby
mode.
9.5
This is a full speed (12Mbits/s) Universal Serial Bus (USB) interface for communicating with other compatible digital
devices. BlueCore4-ROM acts as a USB peripheral, responding to requests from a master host controller such as a
PC.
The USB interface is capable of driving a USB cable directly. No external USB transceiver is required. The device
operates as a USB peripheral, responding to requests from a master host controller such as a PC. Both the OHCI and
the UHCI standards are supported. The set of USB endpoints implemented can behave as specified in the USB
section of the Bluetooth specification v2.1 + EDR or alternatively can appear as a set of endpoints appropriate to USB
audio devices such as speakers.
As USB is a master/slave oriented system (in common with other USB peripherals), BlueCore4-ROM only supports
USB Slave operation.
CS-101564-DSP12
(1)
The range of the signalling level for the standard UART described in section 9.4 and the UART bypass may differ between CSR BlueCore
devices, as the power supply configurations are chip dependent. For BlueCore4-ROM, the standard UART is supplied by VDD_USB, so
has signalling levels of 0V and VDD_USB. Whereas in the UART bypass mode, the signals appear on PIO[4:7] which are supplied by
VDD_PADS, therefore the signalling levels are 0V and VDD_PADS.
UART Bypass
UART Configuration While RESET is Active
UART Bypass Mode
Current Consumption in UART Bypass Mode
USB Interface
Host Processor
RXD
CTS
RTS
TXD
Test Interface
Figure 9.10: UART Bypass Architecture
Production Information
UART_TX
UART_RTS
UART_CTS
UART_RX
RESET
© CSR plc 2003-2007
BlueCore
UART
PIO4
PIO5
PIO6
PIO7
Another Device
TX
RTS
CTS
RX
Device Terminal Descriptions
Page 64 of 97
(1)