CY2833 CYPRESS [Cypress Semiconductor], CY2833 Datasheet - Page 4

• Manufacturer Part Number: CY2833
• Description: Intel CK408 Mobile Clock Synthesizer
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-07507 Rev. *A
Byte 2:PCI Clock Control Register (all bits are Read and Write functional)
Byte 3: PCIF Clock and 48M Control Register (all bits are Read and Write functional)
Byte 4: Control Register (all bits are Read and Write functional)
Byte 5:Clock Control Register (all bits are Read and Write functional)
Bi
Bit
7
6
5
4
3
2
1
0
t
7
6
5
4
3
2
1
0
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@Pu
@Pu
p
0
1
1
1
1
1
1
1
p
1
1
0
1
1
1
1
1
Nam
PCI6
PCI5
PCI4
PCI2
PCI1
PCI0
REF
@Pup
@Pup
e
DOT_48
USB_48
Name
PCI_8
PCI_7
PCIF
PCI8
PCI7
PCIF
0
0
1
1
1
1
1
1
0
1
0
0
0
0
0
0
M
M
REF Output Control. 0 = high strength, 1 = low strength.
PCI6 Output Control. 0 = forced LOW, 1 = enabled
PCI5 Output Control. 0 = forced LOW, 1 = enabled
PCI4 Output Control. 0 = forced LOW, 1 = enabled
Reserved
PCI2 Output Control. 0 = forced LOW, 1 = enabled
PCI1 Output Control. 0 = forced LOW, 1 = enabled
PCI0 Output Control. 0 = forced LOW, 1 = enabled
DOT_48M Output Control. 0 = forced LOW, 1 = enabled
USB_48M Output Control. 0 = forced LOW,1 = enabled
PCI_STOP# Control of PCIF. 0 = Free Running, 1 = Stopped when PCI_STOP# is asserted.
PCI_STOP# Control of PCI8. 0 = Free Running, 1 = Stopped when PCI_STOP# is asserted.
PCI_STOP# Control of PCI7. 0 = Free Running, 1 = Stopped when PCI_STOP# is asserted.
PCIF Output Control. 0 = forced LOW, 1 = running
PCI_8 Output Control. 0 = forced LOW, 1 = running
PCI_7 Output Control. 0 = forced LOW, 1 = running
66BUFF0/3V66_2
3V66_1/VCH
DOT_48M
USB_48M
3V66_0
3V66_5
Name
Name
19
18
SS2 Spread Spectrum Control Bit. 0 = down spread, 1 = center spread).
Reserved. Set = 0.
3V66_0 Output Enable. 0 = disable, 1 = enabled
3V66_1/VCH Output Enable. 0 = disable, 1 = enabled
3V66_5 Output Enable. 0 = disable, 1 = enabled
66BUFF2/3V66_4 Output Enable. 0 = disable, 1 = enabled
66BUFF1/3V66_3 Output Enable. 0 = disable, 1 = enabled
66BUFF0/3V66_2 Output Enable. 0 = disable, 1 = enabled
SS1 Spread Spectrum Control Bit.
SS0 Spread Spectrum Control Bit.
66IN to 66M delay Control MSB.
66IN to 66M delay Control LSB.
Reserved. Set = 0.
DOT_48M Edge Rate Control. When set to 1, the edge is slowed by
15%.
Reserved. Set = 0.
USB_48M edge rate control. When set to 1, the edge is slowed by 15%.
Description
Description
Description
Description
CY28339
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