CY28435OXCT SPECTRALINEAR [SpectraLinear Inc], CY28435OXCT Datasheet - Page 2

• Manufacturer Part Number: CY28435OXCT
• Description: Clock Generator for Intel Grantsdale Chipset
• Manufacturer: SPECTRALINEAR [SpectraLinear Inc]

Rev 1.0, November 20, 2006
Pin Description
1,7
2,6
3,55,56
4
5
8
9
10
17
11
12
18
13
14,15
16
19,20,22,23,
24,25,30,31,
32,33,36, 35
21,28,34
26,27
29
37
38
39
42
41,40,44,43
45
46
47
48
49
50
51
52
Pin No.
VSS_PCI
DOT96T, DOT96C
CPUT/C
VDD_PCI
DF/PCI
FS_E/PCI4
PCI
DF_EN/PCIF0
SRESET_EN/PCIF
1
PCIF2
VTT_PWRGD#/PD
VDD_48
USB48_0
FS_A
VSS_48
FS_B/USB48_1
SRCT/C
VDD_SRC
SRC4_SATAT,
SRC4_SATAC
VSS_SRC
VDDA
VSSA
IREF
VDD_CPU
VSS_CPU
SCLK
SDATA
VDD_REF
XOUT
XIN
VSS_REF
FS_D/REF0
Name
I/O, SE,
I/O, SE,
I/O, PU,
I/O, SE,
I/O,PU,
I/O, SE 3.3V LVTTL input to enable Dynamic Frequency input/33-MHz clock output.
O, DIF Fixed 96 MHz clock output.
O, DIF Differential serial reference clocks. Outputs have overclocking capability.
O, DIF Differential serial reference clock. Recommended output for SATA.
O, DIF Differential CPU clock outputs.
O, SE 33-MHz clock.
O, SE 33-MHz clocks.
O, SE 14.318 MHz crystal output.
PWR 3.3V power supply for outputs.
PWR 3.3V power supply for outputs.
PWR 3.3V power supply for outputs.
PWR 3.3V power supply for PLL.
PWR 3.3V power supply for outputs.
PWR 3.3V power supply for outputs.
GND
I, PD
I, PD
GND
GND
GND
GND
GND
Type
SE
PD
PD
SE
I/O
PD
O
I
I
I
Ground for outputs.
3.3V-tolerant input for CPU frequency selection/33-MHz clock.
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
3.3V LVTTL input to enable Dynamic Frequency input/33-MHz clock output.
(sampled on the VTT_PWRGD# assertion).
1 = Enable, 0 = Disable
3.3V LVTTL input to enable Watchdog/33-MHz clocks.
1 = Enable, 0 = Disable
3.3V LVTTL input. This pin is a level sensitive strobe used to latch the FS_A,
FS_B, FS_C,FS_D and FS_E inputs. After VTT_PWRGD# (active LOW) assertion,
this pin becomes a real-time input for asserting power down (active HIGH).
48-MHz clock output.
3.3V-tolerant input for CPU frequency selection.
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
Ground for outputs.
3.3V-tolerant input for CPU frequency selection/fixed 48-MHz clock output.
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
Ground for outputs.
Ground for PLL.
A precision resistor is attached to this pin, which is connected to the internal
current reference.
Ground for outputs.
SMBus-compatible SCLOCK.
SMBus-compatible SDATA.
14.318 MHz crystal input.
Ground for outputs.
3.3V-tolerant input for CPU frequency selection/Reference clock.
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
Description
CY28435
Page 2 of 22