mx98743 Macronix International Co., mx98743 Datasheet - Page 15
![no-image](/images/manufacturer_photos/0/4/406/macronix_international_co__sml.jpg)
mx98743
Manufacturer Part Number
mx98743
Description
100 Base Fast Ethernet Management Chip
Manufacturer
Macronix International Co.
Datasheet
1.MX98743.pdf
(43 pages)
RS12 RS11 RS[10:8] RS[7:1]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
2
3
4
5
6
7
Table 6-1. SRAM Access & FEM Register Selection Table
00-6F
00-6F
00-6F
00-6F
00-6F
00-6F
00-6F
00-6F
1A
1C
1E
2A
2C
3A
3C
3E
16
18
22
24
26
28
30
32
34
36
38
RS0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
XRC Port Control Register
Link and Partition Status Register
EB O/U and Jabber Status Register
Isolation Status
Partition/Isolation Disable Status
Stored SA Lo for SA Match Interrupt
Stored SA Mid for SA Match Interrupt
Stored SA Hi for SA Match Interrupt
Stored DA Lo for DA Match Interrupt
Stored DA Mid for DA Match Interrupt
Stored DA Hi for DA Match Interrupt
Stored SA1 Lo for Management Packet Received
Stored SA1 Mid for Management Packet Received
Stored SA1 Hi for Management Packet Received
Stored SA2 Lo for Management Packet Received
Stored SA2 Mid for Management Packet Received
Stored SA2 Hi for Management Packet Received
MAC Control Register
MAC Status Register
Port 0 802.3 Attributes and RMON MIBs
Port 1 802.3 Attributes and RMON MIBs
Port 2 802.3 Attributes and RMON MIBs
Port 3 802.3 Attributes and RMON MIBs
Port 4 802.3 Attributes and RMON MIBs
Port 5 802.3 Attributes and RMON MIBs
Port 6 802.3 Attributes and RMON MIBs
Port 7 802.3 Attributes and RMON MIBs
15
REGISTER
MX98743
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
INDEX