mx98743 Macronix International Co., mx98743 Datasheet - Page 19
![no-image](/images/manufacturer_photos/0/4/406/macronix_international_co__sml.jpg)
mx98743
Manufacturer Part Number
mx98743
Description
100 Base Fast Ethernet Management Chip
Manufacturer
Macronix International Co.
Datasheet
1.MX98743.pdf
(43 pages)
- Current page: 19 of 43
- Download datasheet (171Kb)
8.0 REGISTER DEFINITIONS
8.1 MAC CONTROL REGISTER (R/W)
msb
15:8
15
BIT
4-3
2-1
X
7
6
5
0
14
X
Reserved
NAME
REN
S1-0
TEN
RM
RB
13
X
12
X
Reserved
1: Receive brocast packet.
0: Not to eceive brocast packet.
1: Receive multicast packet.
0: Not to receive multicast packet.
1: Receive enable. It is cleared whenreceive buffer overflows or the
FEM is in reset state.
0: Receive disable.
Select page number of receive buffer for CPU access.
[S1,S0] = 00: Page 0;
Reserved
1:Transmit enable. It is cleared by packet transmitted to FEM reset.
0:Transmit disable.
11
X
01: Page 1;
1x: Page 2.
10
X
9
X
Table 7-1.
8
X
19
DESCRIPTION
RB
7
RM REN
6
5
S1
4
S0
3
MX98743
X
2
X
1
lsb
TEN
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
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